Commit 7dd48e96 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven
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riscv: dts: renesas: rzfive-smarc-som: Drop PHY interrupt support for ETH{0,1} 



IRQC support for RZ/Five is still missing so drop the interrupts and
interrupt-parent properties from the PHY nodes of ETH{0,1}.

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230102222708.274369-1-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 87d85b48

arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi

+10 −0
Original line number Diff line number Diff line
@@ -24,10 +24,20 @@ &dmac { 


&eth0 {

	status = "disabled";



	phy0: ethernet-phy@7 {

		/delete-property/ interrupt-parent;

		/delete-property/ interrupts;

	};

};



&eth1 {

	status = "disabled";



	phy1: ethernet-phy@7 {

		/delete-property/ interrupt-parent;

		/delete-property/ interrupts;

	};

};



&sdhi0 {