Commit 018d7b93 authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven
Browse files

arm64: dts: renesas: rzg2lc-smarc-som: Enable serial NOR flash 



Enable mt25qu512a flash connected to QSPI0.

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220307192436.13237-2-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 4eb6a6bb

arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi

+40 −0
Original line number Diff line number Diff line
@@ -110,6 +110,18 @@ gpio-sd0-pwr-en-hog { 
		line-name = "gpio_sd0_pwr_en";

	};



	qspi0_pins: qspi0 {

		qspi0-data {

			pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3";

			power-source = <1800>;

		};



		qspi0-ctrl {

			pins = "QSPI0_SPCLK", "QSPI0_SSL", "QSPI_RESET#";

			power-source = <1800>;

		};

	};



	/*

	 * SD0 device selection is XOR between GPIO_SD0_DEV_SEL and SW1[2]

	 * The below switch logic can be used to select the device between
@@ -175,6 +187,34 @@ sd0_mux_uhs { 
	};

};



&sbc {

	pinctrl-0 = <&qspi0_pins>;

	pinctrl-names = "default";

	status = "okay";



	flash@0 {

		compatible = "micron,mt25qu512a", "jedec,spi-nor";

		reg = <0>;

		m25p,fast-read;

		spi-max-frequency = <50000000>;

		spi-rx-bus-width = <4>;



		partitions {

			compatible = "fixed-partitions";

			#address-cells = <1>;

			#size-cells = <1>;



			boot@0 {

				reg = <0x00000000 0x2000000>;

				read-only;

			};

			user@2000000 {

				reg = <0x2000000 0x2000000>;

			};

		};

	};

};



#if (!SW_SD0_DEV_SEL)

&sdhi0 {

	pinctrl-0 = <&sdhi0_pins>;