Commit 03f1b83d authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Bjorn Andersson
Browse files

clk: qcom: gpucc-msm8998: Use the correct GPLL0 leg with old DTs 



GPUCC has its own GPLL0 legs - one for 1-1 and one for div-2 output.
Add .name lookup to make sure older DTs consume the correct clock.

Reviewed-by: default avatarJeffrey Hugo <quic_jhugo@quicinc.com>
Tested-by: default avatarJeffrey Hugo <quic_jhugo@quicinc.com>
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230622-topic-8998clk-v2-5-6222fbc2916b@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 932d8c56

drivers/clk/qcom/gpucc-msm8998.c

+1 −1
Original line number Diff line number Diff line
@@ -98,7 +98,7 @@ static const struct parent_map gpu_xo_gpll0_map[] = { 


static const struct clk_parent_data gpu_xo_gpll0[] = {

	{ .hw = &gpucc_cxo_clk.clkr.hw },

	{ .fw_name = "gpll0" },

	{ .fw_name = "gpll0", .name = "gcc_gpu_gpll0_clk" },

};



static const struct parent_map gpu_xo_gpupll0_map[] = {