Commit 04f6a8cc authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

ARM: dts: rzg1: Add missing Ethernet PHY resets 



Describe all Ethernet PHY reset GPIOs on RZ/G1 boards, to avoid relying
solely on boot loaders to bring PHYs out of reset.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/e20b3643b4dc5f6c2a9e19d9544495c06075d9ff.1631177442.git.geert+renesas@glider.be
parent 35f875e5

arch/arm/boot/dts/r8a7743-sk-rzg1m.dts

+2 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 


/dts-v1/;

#include "r8a7743.dtsi"

#include <dt-bindings/gpio/gpio.h>



/ {

	model = "SK-RZG1M";
@@ -75,5 +76,6 @@ phy1: ethernet-phy@1 { 
		interrupt-parent = <&irqc>;

		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;

		micrel,led-mode = <1>;

		reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;

	};

};

arch/arm/boot/dts/r8a7745-sk-rzg1e.dts

+2 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 


/dts-v1/;

#include "r8a7745.dtsi"

#include <dt-bindings/gpio/gpio.h>



/ {

	model = "SK-RZG1E";
@@ -70,5 +71,6 @@ phy1: ethernet-phy@1 { 
		interrupt-parent = <&irqc>;

		interrupts = <8 IRQ_TYPE_LEVEL_LOW>;

		micrel,led-mode = <1>;

		reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;

	};

};