Commit 061ba41c authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven
Browse files

arm64: dts: renesas: rzg2lc-smarc: Enable RSPI1 on carrier board 



RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on the
carrier board.  This patch adds pinmux and spi1 nodes to the carrier
board dtsi file and drops deleting pinctl* properties from DTS file.

RSPI1 interface is tested by setting the macro SW_RSPI_CAN to 0.

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220401145702.17954-1-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 79e903fb

arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dts

+0 −6
Original line number Diff line number Diff line
@@ -13,9 +13,3 @@ / { 
	model = "Renesas SMARC EVK based on r9a07g044c2";

	compatible = "renesas,smarc-evk", "renesas,r9a07g044c2", "renesas,r9a07g044";

};
 


&spi1 {

	/delete-property/ pinctrl-0;

	/delete-property/ pinctrl-names;

	status = "disabled";

};

arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi

+7 −0
Original line number Diff line number Diff line
@@ -106,6 +106,13 @@ sound_clk_pins: sound_clk { 
		input-enable;

	};



	spi1_pins: spi1 {

		pinmux = <RZG2L_PORT_PINMUX(44, 0, 1)>, /* CK */

			 <RZG2L_PORT_PINMUX(44, 1, 1)>, /* MOSI */

			 <RZG2L_PORT_PINMUX(44, 2, 1)>, /* MISO */

			 <RZG2L_PORT_PINMUX(44, 3, 1)>; /* SSL */

	};



	ssi0_pins: ssi0 {

		pinmux = <RZG2L_PORT_PINMUX(45, 0, 1)>, /* BCK */

			 <RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */

arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -90,3 +90,11 @@ &scif1 { 
	status = "okay";

};

#endif



#if (SW_RSPI_CAN)

&spi1 {

	/delete-property/ pinctrl-0;

	/delete-property/ pinctrl-names;

	status = "disabled";

};

#endif