Commit 07e6b2e2 authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman
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staging: comedi: ni_mio_common: consolidate call to ni_mseries_get_pll_parameters() 



All cases of the switch call ni_mseries_get_pll_parameters() with the same
parameters. Move the call out of the switch.

Also, move the printk from ni_mseries_get_pll_parameters() so that it can
be converted into a dev_err().

Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 89c4695e

drivers/staging/comedi/drivers/ni_mio_common.c

+12 −20
Original line number Diff line number Diff line
@@ -4902,10 +4902,9 @@ static int ni_mseries_get_pll_parameters(unsigned reference_period_ns, 
			}

		}

	}

	if (best_period_picosec == 0) {

		printk("%s: bug, failed to find pll parameters\n", __func__);

	if (best_period_picosec == 0)

		return -EIO;

	}



	*freq_divider = best_div;

	*freq_multiplier = best_mult;

	*actual_period_ns =
@@ -4948,21 +4947,11 @@ static int ni_mseries_set_pll_master_clock(struct comedi_device *dev, 
	case NI_MIO_PLL_PXI_STAR_TRIGGER_CLOCK:

		devpriv->clock_and_fout2 |=

		    MSeries_PLL_In_Source_Select_Star_Trigger_Bits;

		retval = ni_mseries_get_pll_parameters(period_ns, &freq_divider,

						       &freq_multiplier,

						       &devpriv->clock_ns);

		if (retval < 0)

			return retval;

		break;

	case NI_MIO_PLL_PXI10_CLOCK:

		/* pxi clock is 10MHz */

		devpriv->clock_and_fout2 |=

		    MSeries_PLL_In_Source_Select_PXI_Clock10;

		retval = ni_mseries_get_pll_parameters(period_ns, &freq_divider,

						       &freq_multiplier,

						       &devpriv->clock_ns);

		if (retval < 0)

			return retval;

		break;

	default:

		{
@@ -4981,16 +4970,19 @@ static int ni_mseries_set_pll_master_clock(struct comedi_device *dev, 
			}

			if (rtsi_channel > max_rtsi_channel)

				return -EINVAL;

		}

		break;

	}

	retval = ni_mseries_get_pll_parameters(period_ns,

					       &freq_divider,

					       &freq_multiplier,

							       &devpriv->

							       clock_ns);

			if (retval < 0)

					       &devpriv->clock_ns);

	if (retval < 0) {

		dev_err(dev->class_dev,

			"%s: bug, failed to find pll parameters\n", __func__);

		return retval;

	}

		break;

	}



	ni_writew(dev, devpriv->clock_and_fout2, M_Offset_Clock_and_Fout2);

	pll_control_bits |=

	    MSeries_PLL_Divisor_Bits(freq_divider) |