Commit 09c1db92 authored by Mike Frysinger's avatar Mike Frysinger Committed by Bryan Wu
Browse files

Blackfin arch: delete unused vars and add parenthesis to fixup warnings 



Signed-off-by: default avatarMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: default avatarBryan Wu <cooloney@kernel.org>
parent bda07aac

arch/blackfin/kernel/kgdb.c

+12 −14
Original line number Original line Diff line number Diff line
@@ -382,10 +382,8 @@ int kgdb_arch_handle_exception(int vector, int signo, 
			       struct pt_regs *regs)

			       struct pt_regs *regs)

{

{

	long addr;

	long addr;

	long breakno;

	char *ptr;

	char *ptr;

	int newPC;

	int newPC;

	int wp_status;

	int i;

	int i;





	switch (remcom_in_buffer[0]) {

	switch (remcom_in_buffer[0]) {
@@ -568,12 +566,12 @@ int kgdb_mem2hex(char *mem, char *buf, int count) 
		default:

		default:

			err = EFAULT;

			err = EFAULT;

		}

		}

	} else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START &&

	} else if ((cpu == 0 && (unsigned int)mem >= L1_CODE_START &&

		(unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH

		(unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH)

#ifdef CONFIG_SMP

#ifdef CONFIG_SMP

		|| cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&

		|| (cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&

		(unsigned int)(mem + count) <=

		(unsigned int)(mem + count) <=

		COREB_L1_CODE_START + L1_CODE_LENGTH

		COREB_L1_CODE_START + L1_CODE_LENGTH)

#endif

#endif

		) {

		) {

		/* access L1 instruction SRAM*/

		/* access L1 instruction SRAM*/
@@ -644,12 +642,12 @@ int kgdb_ebin2mem(char *buf, char *mem, int count) 
		default:

		default:

			return EFAULT;

			return EFAULT;

		}

		}

	} else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START &&

	} else if ((cpu == 0 && (unsigned int)mem >= L1_CODE_START &&

		(unsigned int)(mem + count) < L1_CODE_START + L1_CODE_LENGTH

		(unsigned int)(mem + count) < L1_CODE_START + L1_CODE_LENGTH)

#ifdef CONFIG_SMP

#ifdef CONFIG_SMP

		|| cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&

		|| (cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&

		(unsigned int)(mem + count) <=

		(unsigned int)(mem + count) <=

		COREB_L1_CODE_START + L1_CODE_LENGTH

		COREB_L1_CODE_START + L1_CODE_LENGTH)

#endif

#endif

		) {

		) {

		/* access L1 instruction SRAM */

		/* access L1 instruction SRAM */
@@ -709,12 +707,12 @@ int kgdb_hex2mem(char *buf, char *mem, int count) 
		default:

		default:

			return EFAULT;

			return EFAULT;

		}

		}

	} else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START &&

	} else if ((cpu == 0 && (unsigned int)mem >= L1_CODE_START &&

		(unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH

		(unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH)

#ifdef CONFIG_SMP

#ifdef CONFIG_SMP

		|| cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&

		|| (cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&

		(unsigned int)(mem + count) <=

		(unsigned int)(mem + count) <=

		COREB_L1_CODE_START + L1_CODE_LENGTH

		COREB_L1_CODE_START + L1_CODE_LENGTH)

#endif

#endif

		) {

		) {

		/* access L1 instruction SRAM */

		/* access L1 instruction SRAM */