Loading drivers/gpu/drm/nouveau/dispnv50/Kbuild +8 −0 Original line number Diff line number Diff line Loading @@ -2,15 +2,23 @@ nouveau-y += dispnv50/disp.o nouveau-y += dispnv50/core.o nouveau-y += dispnv50/core507d.o nouveau-y += dispnv50/core827d.o nouveau-y += dispnv50/core907d.o nouveau-y += dispnv50/core917d.o nouveau-y += dispnv50/dac507d.o nouveau-y += dispnv50/dac907d.o nouveau-y += dispnv50/pior507d.o nouveau-y += dispnv50/sor507d.o nouveau-y += dispnv50/sor907d.o nouveau-y += dispnv50/head.o nouveau-y += dispnv50/head507d.o nouveau-y += dispnv50/head827d.o nouveau-y += dispnv50/head907d.o nouveau-y += dispnv50/head917d.o nouveau-y += dispnv50/wndw.o Loading drivers/gpu/drm/nouveau/dispnv50/core.c +11 −11 Original line number Diff line number Diff line Loading @@ -42,17 +42,17 @@ nv50_core_new(struct nouveau_drm *drm, struct nv50_core **pcore) int version; int (*new)(struct nouveau_drm *, s32, struct nv50_core **); } cores[] = { { GP102_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GP100_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GM200_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GM107_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GK110_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GK104_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GF110_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GT214_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GT206_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GT200_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { G82_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GP102_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, { GP100_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, { GM200_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, { GM107_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, { GK110_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, { GK104_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, { GF110_DISP_CORE_CHANNEL_DMA, 0, core907d_new }, { GT214_DISP_CORE_CHANNEL_DMA, 0, core827d_new }, { GT206_DISP_CORE_CHANNEL_DMA, 0, core827d_new }, { GT200_DISP_CORE_CHANNEL_DMA, 0, core827d_new }, { G82_DISP_CORE_CHANNEL_DMA, 0, core827d_new }, { NV50_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, {} }; Loading drivers/gpu/drm/nouveau/dispnv50/core.h +20 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,12 @@ int nv50_core_new(struct nouveau_drm *, struct nv50_core **); void nv50_core_del(struct nv50_core **); struct nv50_core_func { void (*init)(struct nv50_core *); void (*ntfy_init)(struct nouveau_bo *, u32 offset); int (*ntfy_wait_done)(struct nouveau_bo *, u32 offset, struct nvif_device *); void (*update)(struct nv50_core *, u32 interlock, bool ntfy); const struct nv50_head_func *head; const struct nv50_outp_func { void (*ctrl)(struct nv50_core *, int or, u32 ctrl, Loading @@ -20,7 +26,21 @@ struct nv50_core_func { }; int core507d_new(struct nouveau_drm *, s32, struct nv50_core **); int core507d_new_(const struct nv50_core_func *, struct nouveau_drm *, s32, struct nv50_core **); void core507d_init(struct nv50_core *); void core507d_ntfy_init(struct nouveau_bo *, u32); int core507d_ntfy_wait_done(struct nouveau_bo *, u32, struct nvif_device *); void core507d_update(struct nv50_core *, u32, bool); extern const struct nv50_outp_func dac507d; extern const struct nv50_outp_func sor507d; extern const struct nv50_outp_func pior507d; int core827d_new(struct nouveau_drm *, s32, struct nv50_core **); int core907d_new(struct nouveau_drm *, s32, struct nv50_core **); extern const struct nv50_outp_func dac907d; extern const struct nv50_outp_func sor907d; int core917d_new(struct nouveau_drm *, s32, struct nv50_core **); #endif drivers/gpu/drm/nouveau/dispnv50/core507d.c +50 −1 Original line number Diff line number Diff line Loading @@ -26,15 +26,64 @@ #include "nouveau_bo.h" void core507d_update(struct nv50_core *core, u32 interlock, bool ntfy) { u32 *push; if ((push = evo_wait(&core->chan, 5))) { if (ntfy) { evo_mthd(push, 0x0084, 1); evo_data(push, 0x80000000 | NV50_DISP_CORE_NTFY); } evo_mthd(push, 0x0080, 2); evo_data(push, interlock); evo_data(push, 0x00000000); evo_kick(push, &core->chan); } } int core507d_ntfy_wait_done(struct nouveau_bo *bo, u32 offset, struct nvif_device *device) { s64 time = nvif_msec(device, 2000ULL, if (nouveau_bo_rd32(bo, offset / 4)) break; usleep_range(1, 2); ); return time < 0 ? time : 0; } void core507d_ntfy_init(struct nouveau_bo *bo, u32 offset) { nouveau_bo_wr32(bo, offset / 4, 0x00000000); } void core507d_init(struct nv50_core *core) { u32 *push; if ((push = evo_wait(&core->chan, 2))) { evo_mthd(push, 0x0088, 1); evo_data(push, core->chan.sync.handle); evo_kick(push, &core->chan); } } static const struct nv50_core_func core507d = { .init = core507d_init, .ntfy_init = core507d_ntfy_init, .ntfy_wait_done = core507d_ntfy_wait_done, .update = core507d_update, .head = &head507d, .dac = &dac507d, .sor = &sor507d, .pior = &pior507d, }; static int int core507d_new_(const struct nv50_core_func *func, struct nouveau_drm *drm, s32 oclass, struct nv50_core **pcore) { Loading drivers/gpu/drm/nouveau/dispnv50/core827d.c 0 → 100644 +41 −0 Original line number Diff line number Diff line /* * Copyright 2018 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #include "core.h" #include "head.h" static const struct nv50_core_func core827d = { .init = core507d_init, .ntfy_init = core507d_ntfy_init, .ntfy_wait_done = core507d_ntfy_wait_done, .update = core507d_update, .head = &head827d, .dac = &dac507d, .sor = &sor507d, .pior = &pior507d, }; int core827d_new(struct nouveau_drm *drm, s32 oclass, struct nv50_core **pcore) { return core507d_new_(&core827d, drm, oclass, pcore); } Loading
drivers/gpu/drm/nouveau/dispnv50/Kbuild +8 −0 Original line number Diff line number Diff line Loading @@ -2,15 +2,23 @@ nouveau-y += dispnv50/disp.o nouveau-y += dispnv50/core.o nouveau-y += dispnv50/core507d.o nouveau-y += dispnv50/core827d.o nouveau-y += dispnv50/core907d.o nouveau-y += dispnv50/core917d.o nouveau-y += dispnv50/dac507d.o nouveau-y += dispnv50/dac907d.o nouveau-y += dispnv50/pior507d.o nouveau-y += dispnv50/sor507d.o nouveau-y += dispnv50/sor907d.o nouveau-y += dispnv50/head.o nouveau-y += dispnv50/head507d.o nouveau-y += dispnv50/head827d.o nouveau-y += dispnv50/head907d.o nouveau-y += dispnv50/head917d.o nouveau-y += dispnv50/wndw.o Loading
drivers/gpu/drm/nouveau/dispnv50/core.c +11 −11 Original line number Diff line number Diff line Loading @@ -42,17 +42,17 @@ nv50_core_new(struct nouveau_drm *drm, struct nv50_core **pcore) int version; int (*new)(struct nouveau_drm *, s32, struct nv50_core **); } cores[] = { { GP102_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GP100_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GM200_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GM107_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GK110_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GK104_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GF110_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GT214_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GT206_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GT200_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { G82_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, { GP102_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, { GP100_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, { GM200_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, { GM107_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, { GK110_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, { GK104_DISP_CORE_CHANNEL_DMA, 0, core917d_new }, { GF110_DISP_CORE_CHANNEL_DMA, 0, core907d_new }, { GT214_DISP_CORE_CHANNEL_DMA, 0, core827d_new }, { GT206_DISP_CORE_CHANNEL_DMA, 0, core827d_new }, { GT200_DISP_CORE_CHANNEL_DMA, 0, core827d_new }, { G82_DISP_CORE_CHANNEL_DMA, 0, core827d_new }, { NV50_DISP_CORE_CHANNEL_DMA, 0, core507d_new }, {} }; Loading
drivers/gpu/drm/nouveau/dispnv50/core.h +20 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,12 @@ int nv50_core_new(struct nouveau_drm *, struct nv50_core **); void nv50_core_del(struct nv50_core **); struct nv50_core_func { void (*init)(struct nv50_core *); void (*ntfy_init)(struct nouveau_bo *, u32 offset); int (*ntfy_wait_done)(struct nouveau_bo *, u32 offset, struct nvif_device *); void (*update)(struct nv50_core *, u32 interlock, bool ntfy); const struct nv50_head_func *head; const struct nv50_outp_func { void (*ctrl)(struct nv50_core *, int or, u32 ctrl, Loading @@ -20,7 +26,21 @@ struct nv50_core_func { }; int core507d_new(struct nouveau_drm *, s32, struct nv50_core **); int core507d_new_(const struct nv50_core_func *, struct nouveau_drm *, s32, struct nv50_core **); void core507d_init(struct nv50_core *); void core507d_ntfy_init(struct nouveau_bo *, u32); int core507d_ntfy_wait_done(struct nouveau_bo *, u32, struct nvif_device *); void core507d_update(struct nv50_core *, u32, bool); extern const struct nv50_outp_func dac507d; extern const struct nv50_outp_func sor507d; extern const struct nv50_outp_func pior507d; int core827d_new(struct nouveau_drm *, s32, struct nv50_core **); int core907d_new(struct nouveau_drm *, s32, struct nv50_core **); extern const struct nv50_outp_func dac907d; extern const struct nv50_outp_func sor907d; int core917d_new(struct nouveau_drm *, s32, struct nv50_core **); #endif
drivers/gpu/drm/nouveau/dispnv50/core507d.c +50 −1 Original line number Diff line number Diff line Loading @@ -26,15 +26,64 @@ #include "nouveau_bo.h" void core507d_update(struct nv50_core *core, u32 interlock, bool ntfy) { u32 *push; if ((push = evo_wait(&core->chan, 5))) { if (ntfy) { evo_mthd(push, 0x0084, 1); evo_data(push, 0x80000000 | NV50_DISP_CORE_NTFY); } evo_mthd(push, 0x0080, 2); evo_data(push, interlock); evo_data(push, 0x00000000); evo_kick(push, &core->chan); } } int core507d_ntfy_wait_done(struct nouveau_bo *bo, u32 offset, struct nvif_device *device) { s64 time = nvif_msec(device, 2000ULL, if (nouveau_bo_rd32(bo, offset / 4)) break; usleep_range(1, 2); ); return time < 0 ? time : 0; } void core507d_ntfy_init(struct nouveau_bo *bo, u32 offset) { nouveau_bo_wr32(bo, offset / 4, 0x00000000); } void core507d_init(struct nv50_core *core) { u32 *push; if ((push = evo_wait(&core->chan, 2))) { evo_mthd(push, 0x0088, 1); evo_data(push, core->chan.sync.handle); evo_kick(push, &core->chan); } } static const struct nv50_core_func core507d = { .init = core507d_init, .ntfy_init = core507d_ntfy_init, .ntfy_wait_done = core507d_ntfy_wait_done, .update = core507d_update, .head = &head507d, .dac = &dac507d, .sor = &sor507d, .pior = &pior507d, }; static int int core507d_new_(const struct nv50_core_func *func, struct nouveau_drm *drm, s32 oclass, struct nv50_core **pcore) { Loading
drivers/gpu/drm/nouveau/dispnv50/core827d.c 0 → 100644 +41 −0 Original line number Diff line number Diff line /* * Copyright 2018 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #include "core.h" #include "head.h" static const struct nv50_core_func core827d = { .init = core507d_init, .ntfy_init = core507d_ntfy_init, .ntfy_wait_done = core507d_ntfy_wait_done, .update = core507d_update, .head = &head827d, .dac = &dac507d, .sor = &sor507d, .pior = &pior507d, }; int core827d_new(struct nouveau_drm *drm, s32 oclass, struct nv50_core **pcore) { return core507d_new_(&core827d, drm, oclass, pcore); }