Commit 0b39db28 authored by Graf Yang's avatar Graf Yang Committed by Mike Frysinger
Browse files

Blackfin: SMP: add PM/CPU hotplug support 



Signed-off-by: default avatarGraf Yang <graf.yang@analog.com>
Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent 0d152c27

arch/blackfin/Kconfig

+5 −1
Original line number Diff line number Diff line
@@ -250,6 +250,11 @@ config NR_CPUS 
	depends on SMP

	default 2 if BF561



config HOTPLUG_CPU

	bool "Support for hot-pluggable CPUs"

	depends on SMP && HOTPLUG

	default y



config IRQ_PER_CPU

	bool

	depends on SMP
@@ -1130,7 +1135,6 @@ source "fs/Kconfig.binfmt" 
endmenu



menu "Power management options"

	depends on !SMP



source "kernel/power/Kconfig"

arch/blackfin/include/asm/smp.h

+7 −0
Original line number Diff line number Diff line
@@ -25,5 +25,12 @@ struct corelock_slot { 


void smp_icache_flush_range_others(unsigned long start,

				   unsigned long end);

#ifdef CONFIG_HOTPLUG_CPU

void coreb_sleep(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);

void cpu_die(void);

void platform_cpu_die(void);

int __cpu_disable(void);

int __cpu_die(unsigned int cpu);

#endif



#endif /* !__ASM_BLACKFIN_SMP_H */

arch/blackfin/mach-bf561/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -6,3 +6,4 @@ obj-y := ints-priority.o dma.o 


obj-$(CONFIG_BF561_COREB) += coreb.o

obj-$(CONFIG_SMP)  += smp.o secondary.o atomic.o

obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o

arch/blackfin/mach-bf561/hotplug.c

0 → 100644
+32 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2007-2009 Analog Devices Inc.

 *               Graff Yang <graf.yang@analog.com>

 *

 * Licensed under the GPL-2 or later.

 */



#include <asm/blackfin.h>

#include <asm/smp.h>

#define SIC_SYSIRQ(irq)	(irq - (IRQ_CORETMR + 1))



int hotplug_coreb;



void platform_cpu_die(void)

{

	unsigned long iwr[2] = {0, 0};

	unsigned long bank = SIC_SYSIRQ(IRQ_SUPPLE_0) / 32;

	unsigned long bit = 1 << (SIC_SYSIRQ(IRQ_SUPPLE_0) % 32);



	hotplug_coreb = 1;



	iwr[bank] = bit;



	/* disable core timer */

	bfin_write_TCNTL(0);



	/* clear ipi interrupt IRQ_SUPPLE_0 */

	bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + 1)));

	SSYNC();



	coreb_sleep(iwr[0], iwr[1], 0);

}

arch/blackfin/mach-bf561/secondary.S

+48 −2
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
#include <linux/init.h>

#include <asm/blackfin.h>

#include <asm/asm-offsets.h>

#include <asm/trace.h>



__INIT
@@ -62,6 +63,8 @@ ENTRY(_coreb_trampoline_start) 
	M2 = r0;

	M3 = r0;



	trace_buffer_init(p0,r0);



	/* Turn off the icache */

	p0.l = LO(IMEM_CONTROL);

	p0.h = HI(IMEM_CONTROL);
@@ -159,6 +162,41 @@ ENTRY(_coreb_trampoline_start) 
ENDPROC(_coreb_trampoline_start)

ENTRY(_coreb_trampoline_end)



.section ".text"

ENTRY(_set_sicb_iwr)

	P0.H = hi(SICB_IWR0);

	P0.L = lo(SICB_IWR0);

	P1.H = hi(SICB_IWR1);

	P1.L = lo(SICB_IWR1);

	[P0] = R0;

	[P1] = R1;

	SSYNC;

	RTS;

ENDPROC(_set_sicb_iwr)



ENTRY(_coreb_sleep)

	sp.l = lo(INITIAL_STACK);

	sp.h = hi(INITIAL_STACK);

	fp = sp;

	usp = sp;



	call _set_sicb_iwr;



	CLI R2;

	SSYNC;

	IDLE;

	STI R2;



	R0 = IWR_DISABLE_ALL;

	R1 = IWR_DISABLE_ALL;

	call _set_sicb_iwr;



	p0.h = hi(COREB_L1_CODE_START);

	p0.l = lo(COREB_L1_CODE_START);

	jump (p0);

ENDPROC(_coreb_sleep)



__CPUINIT

ENTRY(_coreb_start)

	[--sp] = reti;
@@ -176,12 +214,20 @@ ENTRY(_coreb_start) 
	sp = [p0];

	usp = sp;

	fp = sp;

#ifdef CONFIG_HOTPLUG_CPU

	p0.l = _hotplug_coreb;

	p0.h = _hotplug_coreb;

	r0 = [p0];

	cc = BITTST(r0, 0);

	if cc jump 3f;

#endif

	sp += -12;

	call _init_pda

	sp += 12;

#ifdef CONFIG_HOTPLUG_CPU

3:

#endif

	call _secondary_start_kernel;

.L_exit:

	jump.s	.L_exit;

ENDPROC(_coreb_start)
 


__FINIT