Commit 0bf6d62c authored by Francesco Dolcini's avatar Francesco Dolcini Committed by Nishanth Menon
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arm64: dts: ti: verdin-am62: Set I2S_1 MCLK rate 

Set AUDIO_EXT_REFCLK1, used as I2S_1_MCLK on Verdin AM62 family, to 25MHz
(this is the only valid option according to TI [1]).

[1] https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1188051/am625-audio_ext_refclk1-clock-output---dts-support/4476322#4476322



Reviewed-by: default avatarJai Luthra <j-luthra@ti.com>
Signed-off-by: default avatarFrancesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20230807202159.13095-3-francesco@dolcini.it


Signed-off-by: default avatarNishanth Menon <nm@ti.com>
parent 6111ac92

arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -768,6 +768,11 @@ AM62X_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */ /* SODIM 
	};

};



/* VERDIN I2S_1_MCLK */

&audio_refclk1 {

	assigned-clock-rates = <25000000>;

};



&cpsw3g {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_rgmii1>;