Unverified Commit 0c8ccd8b authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Mark Brown
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spi: pxa2xx: Use pxa_ssp_enable()/pxa_ssp_disable() in the driver 



There are few places that repeat the logic of pxa_ssp_enable() and
pxa_ssp_disable(). Use them instead of open coded variants.

Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210510124134.24638-10-andriy.shevchenko@linux.intel.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 4761d2e7

drivers/spi/spi-pxa2xx-dma.c

+1 −3
Original line number Diff line number Diff line
@@ -50,9 +50,7 @@ static void pxa2xx_spi_dma_transfer_complete(struct driver_data *drv_data, 


		if (error) {

			/* In case we got an error we disable the SSP now */

			pxa2xx_spi_write(drv_data, SSCR0,

					 pxa2xx_spi_read(drv_data, SSCR0)

					 & ~SSCR0_SSE);

			pxa_ssp_disable(drv_data->ssp);

			msg->status = -EIO;

		}

drivers/spi/spi-pxa2xx.c

+18 −18
Original line number Diff line number Diff line
@@ -286,13 +286,11 @@ static u32 pxa2xx_configure_sscr0(const struct driver_data *drv_data, 
	case QUARK_X1000_SSP:

		return clk_div

			| QUARK_X1000_SSCR0_Motorola

			| QUARK_X1000_SSCR0_DataSize(bits > 32 ? 8 : bits)

			| SSCR0_SSE;

			| QUARK_X1000_SSCR0_DataSize(bits > 32 ? 8 : bits);

	default:

		return clk_div

			| SSCR0_Motorola

			| SSCR0_DataSize(bits > 16 ? bits - 16 : bits)

			| SSCR0_SSE

			| (bits > 16 ? SSCR0_EDSS : 0);

	}

}
@@ -498,8 +496,7 @@ static void pxa2xx_spi_off(struct driver_data *drv_data) 
	if (is_mmp2_ssp(drv_data))

		return;



	pxa2xx_spi_write(drv_data, SSCR0,

			 pxa2xx_spi_read(drv_data, SSCR0) & ~SSCR0_SSE);

	pxa_ssp_disable(drv_data->ssp);

}



static int null_writer(struct driver_data *drv_data)
@@ -1098,25 +1095,26 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller, 
	    (pxa2xx_spi_read(drv_data, DDS_RATE) != chip->dds_rate))

		pxa2xx_spi_write(drv_data, DDS_RATE, chip->dds_rate);



	/* Stop the SSP */

	if (!is_mmp2_ssp(drv_data))

		pxa_ssp_disable(drv_data->ssp);



	if (!pxa25x_ssp_comp(drv_data))

		pxa2xx_spi_write(drv_data, SSTO, chip->timeout);



	/* see if we need to reload the config registers */

	if ((pxa2xx_spi_read(drv_data, SSCR0) != cr0)

	    || (pxa2xx_spi_read(drv_data, SSCR1) & change_mask)

	    != (cr1 & change_mask)) {

		/* stop the SSP, and update the other bits */

		if (!is_mmp2_ssp(drv_data))

			pxa2xx_spi_write(drv_data, SSCR0, cr0 & ~SSCR0_SSE);

		if (!pxa25x_ssp_comp(drv_data))

			pxa2xx_spi_write(drv_data, SSTO, chip->timeout);

		/* first set CR1 without interrupt and service enables */

		pxa2xx_spi_write(drv_data, SSCR1, cr1 & change_mask);

		/* restart the SSP */

		/* Update the other bits */

		pxa2xx_spi_write(drv_data, SSCR0, cr0);



	} else {

		if (!pxa25x_ssp_comp(drv_data))

			pxa2xx_spi_write(drv_data, SSTO, chip->timeout);

	}



	/* Restart the SSP */

	pxa_ssp_enable(drv_data->ssp);



	if (is_mmp2_ssp(drv_data)) {

		u8 tx_level = (pxa2xx_spi_read(drv_data, SSSR)

					& SSSR_TFL_MASK) >> 8;
@@ -1786,8 +1784,9 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) 
		controller->min_speed_hz =

			DIV_ROUND_UP(controller->max_speed_hz, 512);



	pxa_ssp_disable(ssp);



	/* Load default SSP configuration */

	pxa2xx_spi_write(drv_data, SSCR0, 0);

	switch (drv_data->ssp_type) {

	case QUARK_X1000_SSP:

		tmp = QUARK_X1000_SSCR1_RxTresh(RX_THRESH_QUARK_X1000_DFLT) |
@@ -1928,7 +1927,7 @@ static int pxa2xx_spi_remove(struct platform_device *pdev) 
	spi_unregister_controller(drv_data->controller);



	/* Disable the SSP at the peripheral and SOC level */

	pxa2xx_spi_write(drv_data, SSCR0, 0);

	pxa_ssp_disable(ssp);

	clk_disable_unprepare(ssp->clk);



	/* Release DMA */
@@ -1957,7 +1956,8 @@ static int pxa2xx_spi_suspend(struct device *dev) 
	status = spi_controller_suspend(drv_data->controller);

	if (status != 0)

		return status;

	pxa2xx_spi_write(drv_data, SSCR0, 0);



	pxa_ssp_disable(ssp);



	if (!pm_runtime_suspended(dev))

		clk_disable_unprepare(ssp->clk);

include/linux/pxa2xx_ssp.h

+16 −0
Original line number Diff line number Diff line
@@ -254,6 +254,22 @@ static inline u32 pxa_ssp_read_reg(struct ssp_device *dev, u32 reg) 
	return __raw_readl(dev->mmio_base + reg);

}



static inline void pxa_ssp_enable(struct ssp_device *ssp)

{

	u32 sscr0;



	sscr0 = pxa_ssp_read_reg(ssp, SSCR0) | SSCR0_SSE;

	pxa_ssp_write_reg(ssp, SSCR0, sscr0);

}



static inline void pxa_ssp_disable(struct ssp_device *ssp)

{

	u32 sscr0;



	sscr0 = pxa_ssp_read_reg(ssp, SSCR0) & ~SSCR0_SSE;

	pxa_ssp_write_reg(ssp, SSCR0, sscr0);

}



#if IS_ENABLED(CONFIG_PXA_SSP)

struct ssp_device *pxa_ssp_request(int port, const char *label);

void pxa_ssp_free(struct ssp_device *);

sound/soc/pxa/pxa-ssp.c

+0 −16
Original line number Diff line number Diff line
@@ -61,22 +61,6 @@ static void dump_registers(struct ssp_device *ssp) 
		 pxa_ssp_read_reg(ssp, SSACD));

}



static void pxa_ssp_enable(struct ssp_device *ssp)

{

	uint32_t sscr0;



	sscr0 = __raw_readl(ssp->mmio_base + SSCR0) | SSCR0_SSE;

	__raw_writel(sscr0, ssp->mmio_base + SSCR0);

}



static void pxa_ssp_disable(struct ssp_device *ssp)

{

	uint32_t sscr0;



	sscr0 = __raw_readl(ssp->mmio_base + SSCR0) & ~SSCR0_SSE;

	__raw_writel(sscr0, ssp->mmio_base + SSCR0);

}



static void pxa_ssp_set_dma_params(struct ssp_device *ssp, int width4,

			int out, struct snd_dmaengine_dai_dma_data *dma)

{