Commit 0cfaf224 authored by Manikanta Pubbisetty's avatar Manikanta Pubbisetty Committed by Kalle Valo
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ath11k: Refactor MSI logic to support WCN6750



Refactor MSI logic in order to support hybrid bus devices
like WCN6750.

Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1

Signed-off-by: default avatarManikanta Pubbisetty <quic_mpubbise@quicinc.com>
Signed-off-by: default avatarKalle Valo <quic_kvalo@quicinc.com>
Link: https://lore.kernel.org/r/20220328055714.6449-5-quic_mpubbise@quicinc.com
parent 8d06b802
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+22 −0
Original line number Diff line number Diff line
@@ -769,6 +769,19 @@ struct ath11k_soc_dp_stats {
	struct ath11k_dp_ring_bp_stats bp_stats;
};

struct ath11k_msi_user {
	char *name;
	int num_vectors;
	u32 base_vector;
};

struct ath11k_msi_config {
	int total_vectors;
	int total_users;
	struct ath11k_msi_user *users;
	u16 hw_rev;
};

/* Master structure to hold the hw data which may be used in core module */
struct ath11k_base {
	enum ath11k_hw_rev hw_rev;
@@ -905,6 +918,15 @@ struct ath11k_base {
		u32 subsystem_device;
	} id;

	struct {
		struct {
			const struct ath11k_msi_config *config;
			u32 ep_base_data;
			u32 addr_lo;
			u32 addr_hi;
		} msi;
	} pci;

	/* must be last */
	u8 drv_priv[] __aligned(sizeof(void *));
};
+1 −2
Original line number Diff line number Diff line
@@ -258,8 +258,7 @@ static int ath11k_mhi_get_msi(struct ath11k_pci *ab_pci)
	int *irq;
	unsigned int msi_data;

	ret = ath11k_pcic_get_user_msi_assignment(ab_pci,
						  "MHI", &num_vectors,
	ret = ath11k_pcic_get_user_msi_assignment(ab, "MHI", &num_vectors,
						  &user_base_data, &base_vector);
	if (ret)
		return ret;
+19 −10
Original line number Diff line number Diff line
@@ -307,12 +307,13 @@ static void ath11k_pci_msi_disable(struct ath11k_pci *ab_pci)
static int ath11k_pci_alloc_msi(struct ath11k_pci *ab_pci)
{
	struct ath11k_base *ab = ab_pci->ab;
	const struct ath11k_msi_config *msi_config = ab_pci->msi_config;
	const struct ath11k_msi_config *msi_config = ab->pci.msi.config;
	struct pci_dev *pci_dev = ab_pci->pdev;
	struct msi_desc *msi_desc;
	int num_vectors;
	int ret;

	num_vectors = pci_alloc_irq_vectors(ab_pci->pdev,
	num_vectors = pci_alloc_irq_vectors(pci_dev,
					    msi_config->total_vectors,
					    msi_config->total_vectors,
					    PCI_IRQ_MSI);
@@ -329,7 +330,7 @@ static int ath11k_pci_alloc_msi(struct ath11k_pci *ab_pci)
			goto reset_msi_config;
		}
		clear_bit(ATH11K_PCI_FLAG_MULTI_MSI_VECTORS, &ab_pci->flags);
		ab_pci->msi_config = &msi_config_one_msi;
		ab->pci.msi.config = &msi_config_one_msi;
		ab_pci->irq_flags = IRQF_SHARED | IRQF_NOBALANCING;
		ath11k_dbg(ab, ATH11K_DBG_PCI, "request MSI one vector\n");
	}
@@ -344,11 +345,19 @@ static int ath11k_pci_alloc_msi(struct ath11k_pci *ab_pci)
		goto free_msi_vector;
	}

	ab_pci->msi_ep_base_data = msi_desc->msg.data;
	if (msi_desc->pci.msi_attrib.is_64)
		set_bit(ATH11K_PCI_FLAG_IS_MSI_64, &ab_pci->flags);
	ab->pci.msi.ep_base_data = msi_desc->msg.data;

	pci_read_config_dword(pci_dev, pci_dev->msi_cap + PCI_MSI_ADDRESS_LO,
			      &ab->pci.msi.addr_lo);

	if (msi_desc->pci.msi_attrib.is_64) {
		pci_read_config_dword(pci_dev, pci_dev->msi_cap + PCI_MSI_ADDRESS_HI,
				      &ab->pci.msi.addr_hi);
	} else {
		ab->pci.msi.addr_hi = 0;
	}

	ath11k_dbg(ab, ATH11K_DBG_PCI, "msi base data is %d\n", ab_pci->msi_ep_base_data);
	ath11k_dbg(ab, ATH11K_DBG_PCI, "msi base data is %d\n", ab->pci.msi.ep_base_data);

	return 0;

@@ -375,10 +384,10 @@ static int ath11k_pci_config_msi_data(struct ath11k_pci *ab_pci)
		return -EINVAL;
	}

	ab_pci->msi_ep_base_data = msi_desc->msg.data;
	ab_pci->ab->pci.msi.ep_base_data = msi_desc->msg.data;

	ath11k_dbg(ab_pci->ab, ATH11K_DBG_PCI, "pci after request_irq msi_ep_base_data %d\n",
		   ab_pci->msi_ep_base_data);
		   ab_pci->ab->pci.msi.ep_base_data);

	return 0;
}
@@ -562,7 +571,7 @@ static const struct ath11k_hif_ops ath11k_pci_hif_ops = {
	.irq_enable = ath11k_pcic_ext_irq_enable,
	.irq_disable = ath11k_pcic_ext_irq_disable,
	.get_msi_address =  ath11k_pcic_get_msi_address,
	.get_user_msi_vector = ath11k_get_user_msi_assignment,
	.get_user_msi_vector = ath11k_pcic_get_user_msi_assignment,
	.map_service_to_pipe = ath11k_pcic_map_service_to_pipe,
	.ce_irq_enable = ath11k_pci_hif_ce_irq_enable,
	.ce_irq_disable = ath11k_pci_hif_ce_irq_disable,
+0 −16
Original line number Diff line number Diff line
@@ -53,22 +53,8 @@
#define WLAON_QFPROM_PWR_CTRL_REG		0x01f8031c
#define QFPROM_PWR_CTRL_VDD4BLOW_MASK		0x4

struct ath11k_msi_user {
	char *name;
	int num_vectors;
	u32 base_vector;
};

struct ath11k_msi_config {
	int total_vectors;
	int total_users;
	struct ath11k_msi_user *users;
	u16 hw_rev;
};

enum ath11k_pci_flags {
	ATH11K_PCI_FLAG_INIT_DONE,
	ATH11K_PCI_FLAG_IS_MSI_64,
	ATH11K_PCI_ASPM_RESTORE,
	ATH11K_PCI_FLAG_MULTI_MSI_VECTORS,
};
@@ -78,9 +64,7 @@ struct ath11k_pci {
	struct ath11k_base *ab;
	u16 dev_id;
	char amss_path[100];
	u32 msi_ep_base_data;
	struct mhi_controller *mhi_ctrl;
	const struct ath11k_msi_config *msi_config;
	unsigned long mhi_state;
	u32 register_window;

+8 −33
Original line number Diff line number Diff line
@@ -111,7 +111,6 @@ static const struct ath11k_msi_config ath11k_msi_config[] = {

int ath11k_pcic_init_msi_config(struct ath11k_base *ab)
{
	struct ath11k_pci *ab_pci = ath11k_pci_priv(ab);
	const struct ath11k_msi_config *msi_config;
	int i;

@@ -128,7 +127,7 @@ int ath11k_pcic_init_msi_config(struct ath11k_base *ab)
		return -EINVAL;
	}

	ab_pci->msi_config = msi_config;
	ab->pci.msi.config = msi_config;
	return 0;
}
EXPORT_SYMBOL(ath11k_pcic_init_msi_config);
@@ -267,33 +266,22 @@ int ath11k_pcic_get_msi_irq(struct device *dev, unsigned int vector)
void ath11k_pcic_get_msi_address(struct ath11k_base *ab, u32 *msi_addr_lo,
				 u32 *msi_addr_hi)
{
	struct ath11k_pci *ab_pci = ath11k_pci_priv(ab);
	struct pci_dev *pci_dev = to_pci_dev(ab->dev);

	pci_read_config_dword(pci_dev, pci_dev->msi_cap + PCI_MSI_ADDRESS_LO,
			      msi_addr_lo);

	if (test_bit(ATH11K_PCI_FLAG_IS_MSI_64, &ab_pci->flags)) {
		pci_read_config_dword(pci_dev, pci_dev->msi_cap + PCI_MSI_ADDRESS_HI,
				      msi_addr_hi);
	} else {
		*msi_addr_hi = 0;
	}
	*msi_addr_lo = ab->pci.msi.addr_lo;
	*msi_addr_hi = ab->pci.msi.addr_hi;
}

int ath11k_pcic_get_user_msi_assignment(struct ath11k_pci *ab_pci, char *user_name,
int ath11k_pcic_get_user_msi_assignment(struct ath11k_base *ab, char *user_name,
					int *num_vectors, u32 *user_base_data,
					u32 *base_vector)
{
	struct ath11k_base *ab = ab_pci->ab;
	const struct ath11k_msi_config *msi_config = ab_pci->msi_config;
	const struct ath11k_msi_config *msi_config = ab->pci.msi.config;
	int idx;

	for (idx = 0; idx < msi_config->total_users; idx++) {
		if (strcmp(user_name, msi_config->users[idx].name) == 0) {
			*num_vectors = msi_config->users[idx].num_vectors;
			*base_vector =  msi_config->users[idx].base_vector;
			*user_base_data = *base_vector + ab_pci->msi_ep_base_data;
			*user_base_data = *base_vector + ab->pci.msi.ep_base_data;

			ath11k_dbg(ab, ATH11K_DBG_PCI,
				   "Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
@@ -325,17 +313,6 @@ void ath11k_pcic_get_ce_msi_idx(struct ath11k_base *ab, u32 ce_id, u32 *msi_idx)
	*msi_idx = msi_data_idx;
}

int ath11k_get_user_msi_assignment(struct ath11k_base *ab, char *user_name,
				   int *num_vectors, u32 *user_base_data,
				   u32 *base_vector)
{
	struct ath11k_pci *ab_pci = ath11k_pci_priv(ab);

	return ath11k_pcic_get_user_msi_assignment(ab_pci, user_name,
						   num_vectors, user_base_data,
						   base_vector);
}

static void ath11k_pcic_free_ext_irq(struct ath11k_base *ab)
{
	int i, j;
@@ -586,8 +563,7 @@ static int ath11k_pcic_ext_irq_config(struct ath11k_base *ab)
	int i, j, ret, num_vectors = 0;
	u32 user_base_data = 0, base_vector = 0;

	ret = ath11k_pcic_get_user_msi_assignment(ath11k_pci_priv(ab), "DP",
						  &num_vectors,
	ret = ath11k_pcic_get_user_msi_assignment(ab, "DP", &num_vectors,
						  &user_base_data,
						  &base_vector);
	if (ret < 0)
@@ -662,8 +638,7 @@ int ath11k_pcic_config_irq(struct ath11k_base *ab)
	unsigned int msi_data;
	int irq, i, ret, irq_idx;

	ret = ath11k_pcic_get_user_msi_assignment(ath11k_pci_priv(ab),
						  "CE", &msi_data_count,
	ret = ath11k_pcic_get_user_msi_assignment(ab, "CE", &msi_data_count,
						  &msi_data_start, &msi_irq_start);
	if (ret)
		return ret;
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