Commit 0feab025 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/gr/gf100-: virtualise init_419cc0 + apply fixes from traces 



Pulled some init out of main per-GPC/TPC loops to match RM.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 0a5b9730

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c

+19 −2
Original line number Diff line number Diff line
@@ -1914,6 +1914,20 @@ gf100_gr_new_(const struct gf100_gr_func *func, struct nvkm_device *device, 
	return 0;

}



void

gf100_gr_init_419cc0(struct gf100_gr *gr)

{

	struct nvkm_device *device = gr->base.engine.subdev.device;

	int gpc, tpc;



	nvkm_mask(device, 0x419cc0, 0x00000008, 0x00000008);



	for (gpc = 0; gpc < gr->gpc_nr; gpc++) {

		for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++)

			nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000);

	}

}



void

gf100_gr_init_40601c(struct gf100_gr *gr)

{
@@ -2042,7 +2056,10 @@ gf100_gr_init(struct gf100_gr *gr) 


	nvkm_wr32(device, 0x405840, 0xc0000000);

	nvkm_wr32(device, 0x405844, 0x00ffffff);

	nvkm_mask(device, 0x419cc0, 0x00000008, 0x00000008);



	if (gr->func->init_419cc0)

		gr->func->init_419cc0(gr);



	nvkm_mask(device, 0x419eb4, 0x00001000, 0x00001000);



	for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
@@ -2054,7 +2071,6 @@ gf100_gr_init(struct gf100_gr *gr) 
			nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);

			nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);

			nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);

			nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000);

			nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);

			nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x001ffffe);

			nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x0000000f);
@@ -2113,6 +2129,7 @@ gf100_gr = { 
	.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,

	.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,

	.init_40601c = gf100_gr_init_40601c,

	.init_419cc0 = gf100_gr_init_419cc0,

	.mmio = gf100_gr_pack_mmio,

	.fecs.ucode = &gf100_gr_fecs_ucode,

	.gpccs.ucode = &gf100_gr_gpccs_ucode,

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h

+2 −0
Original line number Diff line number Diff line
@@ -134,6 +134,7 @@ struct gf100_gr_func { 
	void (*init_ds_hww_esr_2)(struct gf100_gr *);

	void (*init_40601c)(struct gf100_gr *);

	void (*init_sked_hww_esr)(struct gf100_gr *);

	void (*init_419cc0)(struct gf100_gr *);

	void (*init_ppc_exceptions)(struct gf100_gr *);

	void (*set_hww_esr_report_mask)(struct gf100_gr *);

	const struct gf100_gr_pack *mmio;
@@ -157,6 +158,7 @@ void gf100_gr_init_zcull(struct gf100_gr *); 
void gf100_gr_init_num_active_ltcs(struct gf100_gr *);

void gf100_gr_init_fecs_exceptions(struct gf100_gr *);

void gf100_gr_init_40601c(struct gf100_gr *);

void gf100_gr_init_419cc0(struct gf100_gr *);



void gf117_gr_init_zcull(struct gf100_gr *);

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf104.c

+1 −0
Original line number Diff line number Diff line
@@ -121,6 +121,7 @@ gf104_gr = { 
	.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,

	.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,

	.init_40601c = gf100_gr_init_40601c,

	.init_419cc0 = gf100_gr_init_419cc0,

	.mmio = gf104_gr_pack_mmio,

	.fecs.ucode = &gf100_gr_fecs_ucode,

	.gpccs.ucode = &gf100_gr_gpccs_ucode,

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf108.c

+1 −0
Original line number Diff line number Diff line
@@ -119,6 +119,7 @@ gf108_gr = { 
	.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,

	.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,

	.init_40601c = gf100_gr_init_40601c,

	.init_419cc0 = gf100_gr_init_419cc0,

	.mmio = gf108_gr_pack_mmio,

	.fecs.ucode = &gf100_gr_fecs_ucode,

	.gpccs.ucode = &gf100_gr_gpccs_ucode,

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf110.c

+1 −0
Original line number Diff line number Diff line
@@ -93,6 +93,7 @@ gf110_gr = { 
	.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,

	.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,

	.init_40601c = gf100_gr_init_40601c,

	.init_419cc0 = gf100_gr_init_419cc0,

	.mmio = gf110_gr_pack_mmio,

	.fecs.ucode = &gf100_gr_fecs_ucode,

	.gpccs.ucode = &gf100_gr_gpccs_ucode,