Commit 101827e1 authored by Jonathan Kim's avatar Jonathan Kim Committed by Alex Deucher
Browse files

drm/amdkfd: add debug wave launch override operation 



This operation allows the debugger to override the enabled HW
exceptions on the device.

On debug devices that only support the debugging of a single process,
the HW exceptions are global and set through the SPI_GDBG_TRAP_MASK
register.
Because they are global, only address watch exceptions are allowed to
be enabled.  In other words, the debugger must preserve all non-address
watch exception states in normal mode operation by barring a full
replacement override or a non-address watch override request.

For multi-process debugging, all HW exception overrides are per-VMID so
all exceptions can be overridden or fully replaced.

In order for the debugger to know what is permissible, returned the
supported override mask back to the debugger along with the previously
enable overrides.

Signed-off-by: default avatarJonathan Kim <jonathan.kim@amd.com>
Reviewed-by: default avatarFelix Kuehling <felix.kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e90bf919

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c

+47 −0
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ 
#include "amdgpu_amdkfd_gfx_v9.h"

#include "gc/gc_9_4_2_offset.h"

#include "gc/gc_9_4_2_sh_mask.h"

#include <uapi/linux/kfd_ioctl.h>



/*

 * Returns TRAP_EN, EXCP_EN and EXCP_REPLACE.
@@ -62,6 +63,50 @@ static uint32_t kgd_aldebaran_disable_debug_trap(struct amdgpu_device *adev, 
	return data;

}



static int kgd_aldebaran_validate_trap_override_request(struct amdgpu_device *adev,

							uint32_t trap_override,

							uint32_t *trap_mask_supported)

{

	*trap_mask_supported &= KFD_DBG_TRAP_MASK_FP_INVALID |

				KFD_DBG_TRAP_MASK_FP_INPUT_DENORMAL |

				KFD_DBG_TRAP_MASK_FP_DIVIDE_BY_ZERO |

				KFD_DBG_TRAP_MASK_FP_OVERFLOW |

				KFD_DBG_TRAP_MASK_FP_UNDERFLOW |

				KFD_DBG_TRAP_MASK_FP_INEXACT |

				KFD_DBG_TRAP_MASK_INT_DIVIDE_BY_ZERO |

				KFD_DBG_TRAP_MASK_DBG_ADDRESS_WATCH |

				KFD_DBG_TRAP_MASK_DBG_MEMORY_VIOLATION;



	if (trap_override != KFD_DBG_TRAP_OVERRIDE_OR &&

			trap_override != KFD_DBG_TRAP_OVERRIDE_REPLACE)

		return -EPERM;



	return 0;

}



/* returns TRAP_EN, EXCP_EN and EXCP_RPLACE. */

static uint32_t kgd_aldebaran_set_wave_launch_trap_override(struct amdgpu_device *adev,

					uint32_t vmid,

					uint32_t trap_override,

					uint32_t trap_mask_bits,

					uint32_t trap_mask_request,

					uint32_t *trap_mask_prev,

					uint32_t kfd_dbg_trap_cntl_prev)



{

	uint32_t data = 0;



	*trap_mask_prev = REG_GET_FIELD(kfd_dbg_trap_cntl_prev, SPI_GDBG_PER_VMID_CNTL, EXCP_EN);

	trap_mask_bits = (trap_mask_bits & trap_mask_request) |

		(*trap_mask_prev & ~trap_mask_request);



	data = REG_SET_FIELD(data, SPI_GDBG_PER_VMID_CNTL, TRAP_EN, 1);

	data = REG_SET_FIELD(data, SPI_GDBG_PER_VMID_CNTL, EXCP_EN, trap_mask_bits);

	data = REG_SET_FIELD(data, SPI_GDBG_PER_VMID_CNTL, EXCP_REPLACE, trap_override);



	return data;

}



const struct kfd2kgd_calls aldebaran_kfd2kgd = {

	.program_sh_mem_settings = kgd_gfx_v9_program_sh_mem_settings,

	.set_pasid_vmid_mapping = kgd_gfx_v9_set_pasid_vmid_mapping,
@@ -82,6 +127,8 @@ const struct kfd2kgd_calls aldebaran_kfd2kgd = { 
	.get_cu_occupancy = kgd_gfx_v9_get_cu_occupancy,

	.enable_debug_trap = kgd_aldebaran_enable_debug_trap,

	.disable_debug_trap = kgd_aldebaran_disable_debug_trap,

	.validate_trap_override_request = kgd_aldebaran_validate_trap_override_request,

	.set_wave_launch_trap_override = kgd_aldebaran_set_wave_launch_trap_override,

	.get_iq_wait_times = kgd_gfx_v9_get_iq_wait_times,

	.build_grace_period_packet_info = kgd_gfx_v9_build_grace_period_packet_info,

	.program_trap_handler_settings = kgd_gfx_v9_program_trap_handler_settings,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

+2 −0
Original line number Diff line number Diff line
@@ -410,6 +410,8 @@ const struct kfd2kgd_calls arcturus_kfd2kgd = { 
				kgd_gfx_v9_set_vm_context_page_table_base,

	.enable_debug_trap = kgd_arcturus_enable_debug_trap,

	.disable_debug_trap = kgd_arcturus_disable_debug_trap,

	.validate_trap_override_request = kgd_gfx_v9_validate_trap_override_request,

	.set_wave_launch_trap_override = kgd_gfx_v9_set_wave_launch_trap_override,

	.get_iq_wait_times = kgd_gfx_v9_get_iq_wait_times,

	.build_grace_period_packet_info = kgd_gfx_v9_build_grace_period_packet_info,

	.get_cu_occupancy = kgd_gfx_v9_get_cu_occupancy,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

+55 −0
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ 
#include "v10_structs.h"

#include "nv.h"

#include "nvd.h"

#include <uapi/linux/kfd_ioctl.h>



enum hqd_dequeue_request_type {

	NO_ACTION = 0,
@@ -803,6 +804,58 @@ uint32_t kgd_gfx_v10_disable_debug_trap(struct amdgpu_device *adev, 
	return 0;

}



int kgd_gfx_v10_validate_trap_override_request(struct amdgpu_device *adev,

					      uint32_t trap_override,

					      uint32_t *trap_mask_supported)

{

	*trap_mask_supported &= KFD_DBG_TRAP_MASK_DBG_ADDRESS_WATCH;



	/* The SPI_GDBG_TRAP_MASK register is global and affects all

	 * processes. Only allow OR-ing the address-watch bit, since

	 * this only affects processes under the debugger. Other bits

	 * should stay 0 to avoid the debugger interfering with other

	 * processes.

	 */

	if (trap_override != KFD_DBG_TRAP_OVERRIDE_OR)

		return -EINVAL;



	return 0;

}



uint32_t kgd_gfx_v10_set_wave_launch_trap_override(struct amdgpu_device *adev,

					      uint32_t vmid,

					      uint32_t trap_override,

					      uint32_t trap_mask_bits,

					      uint32_t trap_mask_request,

					      uint32_t *trap_mask_prev,

					      uint32_t kfd_dbg_trap_cntl_prev)

{

	uint32_t data, wave_cntl_prev;



	mutex_lock(&adev->grbm_idx_mutex);



	wave_cntl_prev = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL));



	kgd_gfx_v10_set_wave_launch_stall(adev, vmid, true);



	data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK));

	*trap_mask_prev = REG_GET_FIELD(data, SPI_GDBG_TRAP_MASK, EXCP_EN);



	trap_mask_bits = (trap_mask_bits & trap_mask_request) |

		(*trap_mask_prev & ~trap_mask_request);



	data = REG_SET_FIELD(data, SPI_GDBG_TRAP_MASK, EXCP_EN, trap_mask_bits);

	data = REG_SET_FIELD(data, SPI_GDBG_TRAP_MASK, REPLACE, trap_override);

	WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), data);



	/* We need to preserve wave launch mode stall settings. */

	WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), wave_cntl_prev);



	mutex_unlock(&adev->grbm_idx_mutex);



	return 0;

}



/* kgd_gfx_v10_get_iq_wait_times: Returns the mmCP_IQ_WAIT_TIME1/2 values

 * The values read are:

 *     ib_offload_wait_time     -- Wait Count for Indirect Buffer Offloads.
@@ -889,6 +942,8 @@ const struct kfd2kgd_calls gfx_v10_kfd2kgd = { 
	.set_vm_context_page_table_base = set_vm_context_page_table_base,

	.enable_debug_trap = kgd_gfx_v10_enable_debug_trap,

	.disable_debug_trap = kgd_gfx_v10_disable_debug_trap,

	.validate_trap_override_request = kgd_gfx_v10_validate_trap_override_request,

	.set_wave_launch_trap_override = kgd_gfx_v10_set_wave_launch_trap_override,

	.get_iq_wait_times = kgd_gfx_v10_get_iq_wait_times,

	.build_grace_period_packet_info = kgd_gfx_v10_build_grace_period_packet_info,

	.program_trap_handler_settings = program_trap_handler_settings,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h

+10 −0
Original line number Diff line number Diff line
@@ -26,6 +26,16 @@ uint32_t kgd_gfx_v10_enable_debug_trap(struct amdgpu_device *adev, 
uint32_t kgd_gfx_v10_disable_debug_trap(struct amdgpu_device *adev,

					bool keep_trap_enabled,

					uint32_t vmid);

int kgd_gfx_v10_validate_trap_override_request(struct amdgpu_device *adev,

					     uint32_t trap_override,

					     uint32_t *trap_mask_supported);

uint32_t kgd_gfx_v10_set_wave_launch_trap_override(struct amdgpu_device *adev,

					     uint32_t vmid,

					     uint32_t trap_override,

					     uint32_t trap_mask_bits,

					     uint32_t trap_mask_request,

					     uint32_t *trap_mask_prev,

					     uint32_t kfd_dbg_trap_cntl_prev);

void kgd_gfx_v10_get_iq_wait_times(struct amdgpu_device *adev, uint32_t *wait_times);

void kgd_gfx_v10_build_grace_period_packet_info(struct amdgpu_device *adev,

					       uint32_t wait_times,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

+4 −1
Original line number Diff line number Diff line
@@ -675,5 +675,8 @@ const struct kfd2kgd_calls gfx_v10_3_kfd2kgd = { 
	.get_iq_wait_times = kgd_gfx_v10_get_iq_wait_times,

	.build_grace_period_packet_info = kgd_gfx_v10_build_grace_period_packet_info,

	.enable_debug_trap = kgd_gfx_v10_enable_debug_trap,

	.disable_debug_trap = kgd_gfx_v10_disable_debug_trap

	.disable_debug_trap = kgd_gfx_v10_disable_debug_trap,

	.validate_trap_override_request = kgd_gfx_v10_validate_trap_override_request,

	.set_wave_launch_trap_override = kgd_gfx_v10_set_wave_launch_trap_override



};