Commit 10fb3e27 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

arm64: dts: renesas: falcon: Describe CAN clock 



Describe the 40 MHz Crystal Clock Oscillator providing CAN_CLK.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/0bf36a1708ad87c00455b96ebaacc63fb7305b7a.1675164686.git.geert+renesas@glider.be
parent b6c0be72

arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts

+10 −1
Original line number Diff line number Diff line
@@ -37,8 +37,12 @@ phy0: ethernet-phy@0 { 
	};

};



&can_clk {

	clock-frequency = <40000000>;

};



&canfd {

	pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>;

	pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>, <&can_clk_pins>;

	pinctrl-names = "default";

	status = "okay";
@@ -80,6 +84,11 @@ pins_mii { 


	};



	can_clk_pins: can-clk {

		groups = "can_clk";

		function = "can_clk";

	};



	canfd0_pins: canfd0 {

		groups = "canfd0_data";

		function = "canfd0";