Commit 11589813 authored by Dmytro Laktyushkin's avatar Dmytro Laktyushkin Committed by Alex Deucher
Browse files

drm/amd/display: fix enable_optc_clock reg_wait timeouts 



Signed-off-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2f1e8efd

drivers/gpu/drm/amd/display/dc/dc_helper.c

+7 −1
Original line number Diff line number Diff line
@@ -135,6 +135,9 @@ uint32_t generic_reg_wait(const struct dc_context *ctx, 
	uint32_t reg_val;

	int i;



	if (ctx->dce_environment == DCE_ENV_FPGA_MAXIMUS)

		time_out_num_tries *= 20;



	for (i = 0; i <= time_out_num_tries; i++) {

		if (i) {

			if (0 < delay_between_poll_us && delay_between_poll_us < 1000)
@@ -152,7 +155,10 @@ uint32_t generic_reg_wait(const struct dc_context *ctx, 
			return reg_val;

	}



	DC_ERR("REG_WAIT timeout %dus * %d tries - %s\n",

	dm_error("REG_WAIT timeout %dus * %d tries - %s\n",

			delay_between_poll_us, time_out_num_tries, func_name);

	if (ctx->dce_environment != DCE_ENV_FPGA_MAXIMUS)

		BREAK_TO_DEBUGGER();



	return reg_val;

}

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c

+4 −4
Original line number Diff line number Diff line
@@ -449,7 +449,7 @@ static void enable_optc_clock(struct timing_generator *tg, bool enable) 


		REG_WAIT(OPTC_INPUT_CLOCK_CONTROL,

				OPTC_INPUT_CLK_ON, 1,

				20000, 200000);

				2000, 500);



		/* Enable clock */

		REG_UPDATE(OTG_CLOCK_CONTROL,
@@ -457,7 +457,7 @@ static void enable_optc_clock(struct timing_generator *tg, bool enable) 


		REG_WAIT(OTG_CLOCK_CONTROL,

				OTG_CLOCK_ON, 1,

				20000, 200000);

				2000, 500);

	} else  {

		REG_UPDATE_2(OTG_CLOCK_CONTROL,

				OTG_CLOCK_GATE_DIS, 0,
@@ -465,7 +465,7 @@ static void enable_optc_clock(struct timing_generator *tg, bool enable) 


		REG_WAIT(OTG_CLOCK_CONTROL,

				OTG_CLOCK_ON, 0,

				20000, 200000);

				2000, 500);



		REG_UPDATE_2(OPTC_INPUT_CLOCK_CONTROL,

				OPTC_INPUT_CLK_GATE_DIS, 0,
@@ -473,7 +473,7 @@ static void enable_optc_clock(struct timing_generator *tg, bool enable) 


		REG_WAIT(OPTC_INPUT_CLOCK_CONTROL,

				OPTC_INPUT_CLK_ON, 0,

				20000, 200000);

				2000, 500);

	}

}