Commit 134b5ce3 authored by Bjorn Andersson's avatar Bjorn Andersson Committed by Bjorn Helgaas
Browse files

PCI: qcom: Remove ddrss_sf_tbu clock from SC8180X 

The Qualcomm SC8180X platform was piggy-backing on the SM8250
qcom_pcie_cfg, but SC8180X doesn't have the ddrss_sf_tbu clock, so
it now fails to probe due to the missing clock.

Give SC8180X its own qcom_pcie_cfg, without the ddrss_sf_tbu flag set.

Fixes: 0614f98b ("PCI: qcom: Add ddrss_sf_tbu flag")
Link: https://lore.kernel.org/r/20220331013415.592748-1-bjorn.andersson@linaro.org


Tested-by: default avatarSteev Klimaszewski <steev@kali.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: default avatarStanimir Varbanov <svarbanov@mm-sol.com>
parent 92597f97

drivers/pci/controller/dwc/pcie-qcom.c

+6 −1
Original line number Diff line number Diff line
@@ -1550,6 +1550,11 @@ static const struct qcom_pcie_cfg sc7280_cfg = { 
	.pipe_clk_need_muxing = true,

};



static const struct qcom_pcie_cfg sc8180x_cfg = {

	.ops = &ops_1_9_0,

	.has_tbu_clk = true,

};



static const struct dw_pcie_ops dw_pcie_ops = {

	.link_up = qcom_pcie_link_up,

	.start_link = qcom_pcie_start_link,
@@ -1656,7 +1661,7 @@ static const struct of_device_id qcom_pcie_match[] = { 
	{ .compatible = "qcom,pcie-qcs404", .data = &ipq4019_cfg },

	{ .compatible = "qcom,pcie-sdm845", .data = &sdm845_cfg },

	{ .compatible = "qcom,pcie-sm8250", .data = &sm8250_cfg },

	{ .compatible = "qcom,pcie-sc8180x", .data = &sm8250_cfg },

	{ .compatible = "qcom,pcie-sc8180x", .data = &sc8180x_cfg },

	{ .compatible = "qcom,pcie-sm8450-pcie0", .data = &sm8450_pcie0_cfg },

	{ .compatible = "qcom,pcie-sm8450-pcie1", .data = &sm8450_pcie1_cfg },

	{ .compatible = "qcom,pcie-sc7280", .data = &sc7280_cfg },