Commit 13ea8b35 authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven
Browse files

arm64: dts: renesas: r9a07g043: Add GbEthernet nodes 



Add Gigabit Ethernet{0,1} nodes to SoC DTSI.

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-5-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 20e63d39

arch/arm64/boot/dts/renesas/r9a07g043.dtsi

+40 −0
Original line number Diff line number Diff line
@@ -365,6 +365,46 @@ sdhi1: mmc@11c10000 { 
			status = "disabled";

		};



		eth0: ethernet@11c20000 {

			compatible = "renesas,r9a07g043-gbeth",

				     "renesas,rzg2l-gbeth";

			reg = <0 0x11c20000 0 0x10000>;

			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "mux", "fil", "arp_ns";

			phy-mode = "rgmii";

			clocks = <&cpg CPG_MOD R9A07G043_ETH0_CLK_AXI>,

				 <&cpg CPG_MOD R9A07G043_ETH0_CLK_CHI>,

				 <&cpg CPG_CORE R9A07G043_CLK_HP>;

			clock-names = "axi", "chi", "refclk";

			resets = <&cpg R9A07G043_ETH0_RST_HW_N>;

			power-domains = <&cpg>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		eth1: ethernet@11c30000 {

			compatible = "renesas,r9a07g043-gbeth",

				     "renesas,rzg2l-gbeth";

			reg = <0 0x11c30000 0 0x10000>;

			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "mux", "fil", "arp_ns";

			phy-mode = "rgmii";

			clocks = <&cpg CPG_MOD R9A07G043_ETH1_CLK_AXI>,

				 <&cpg CPG_MOD R9A07G043_ETH1_CLK_CHI>,

				 <&cpg CPG_CORE R9A07G043_CLK_HP>;

			clock-names = "axi", "chi", "refclk";

			resets = <&cpg R9A07G043_ETH1_RST_HW_N>;

			power-domains = <&cpg>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		phyrst: usbphy-ctrl@11c40000 {

			reg = <0 0x11c40000 0 0x10000>;

			/* place holder */