Commit 1480bcf0 authored Jan 26, 2023 by Eddie James Committed by Joel Stanley Feb 01, 2023

ARM: dts: aspeed: p10bmc: Enable UART2



The APSS can be accessed over the second uart on these systems.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20230126220842.885965-1-eajames@linux.ibm.com


Signed-off-by: Joel Stanley <joel@jms.id.au>

parent 28cfb03a

arch/arm/boot/dts/aspeed-bmc-ibm-bonnell.dts

+4 −0

Original line number	Diff line number	Diff line
		@@ -857,6 +857,10 @@ &i2c15 {
		status = "okay";
		};

		&uart2 {
		status = "okay";
		};

		&vuart1 {
		status = "okay";
		};

arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts

+4 −0

Original line number	Diff line number	Diff line
		@@ -3649,6 +3649,10 @@ &ibt {
		status = "okay";
		};

		&uart2 {
		status = "okay";
		};

		&vuart1 {
		status = "okay";
		};

arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts

+4 −0

Original line number	Diff line number	Diff line
		@@ -2352,6 +2352,10 @@ led@7 {
		};
		};

		&uart2 {
		status = "okay";
		};

		&vuart1 {
		status = "okay";
		};