Commit 151a49d0 authored by Tom O'Rourke's avatar Tom O'Rourke Committed by Daniel Vetter
Browse files

drm/i915: Extend pcode mailbox interface 



In sandybridge_pcode_read and sandybridge_pcode_write,
extend the mbox parameter from u8 to u32.

On Haswell and Sandybridge, bits 7:0 encode the mailbox
command and bits 28:8 are used for address control for
specific commands.

Based on suggestion from Ville Syrjälä.

Signed-off-by: default avatarTom O'Rourke <Tom.O'Rourke@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 90bd1f46

drivers/gpu/drm/i915/i915_drv.h

+2 −2
Original line number Diff line number Diff line
@@ -2975,8 +2975,8 @@ void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv, int fw_engine); 
void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv, int fw_engine);

void assert_force_wake_inactive(struct drm_i915_private *dev_priv);



int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u8 mbox, u32 *val);

int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u8 mbox, u32 val);

int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val);

int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u32 mbox, u32 val);



/* intel_sideband.c */

u32 vlv_punit_read(struct drm_i915_private *dev_priv, u8 addr);

drivers/gpu/drm/i915/intel_pm.c

+2 −2
Original line number Diff line number Diff line
@@ -7158,7 +7158,7 @@ void intel_init_pm(struct drm_device *dev) 
	}

}



int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u8 mbox, u32 *val)

int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val)

{

	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
@@ -7183,7 +7183,7 @@ int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u8 mbox, u32 *val) 
	return 0;

}



int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u8 mbox, u32 val)

int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u32 mbox, u32 val)

{

	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));