Commit 1581355b authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Rob Herring
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dt-bindings: ufs: cdns,ufshc: convert to dtschema



Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema
format.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220306111125.116455-4-krzysztof.kozlowski@canonical.com
parent cebe2234
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* Cadence Universal Flash Storage (UFS) Controller

UFS nodes are defined to describe on-chip UFS host controllers.
Each UFS controller instance should have its own node.
Please see the ufshcd-pltfrm.txt for a list of all available properties.

Required properties:
- compatible	: Compatible list, contains one of the following controllers:
			"cdns,ufshc" - Generic CDNS HCI,
			"cdns,ufshc-m31-16nm" - CDNS UFS HC + M31 16nm PHY
		  complemented with the JEDEC version:
			"jedec,ufs-2.0"

- reg		: Address and length of the UFS register set.
- interrupts	: One interrupt mapping.
- freq-table-hz	: Clock frequency table.
		  See the ufshcd-pltfrm.txt for details.
- clocks	: List of phandle and clock specifier pairs.
- clock-names	: List of clock input name strings sorted in the same
		  order as the clocks property. "core_clk" is mandatory.
		  Depending on a type of a PHY,
		  the "phy_clk" clock can also be added, if needed.

Example:
	ufs@fd030000 {
		compatible = "cdns,ufshc", "jedec,ufs-2.0";
		reg = <0xfd030000 0x10000>;
		interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>;
		freq-table-hz = <0 0>, <0 0>;
		clocks = <&ufs_core_clk>, <&ufs_phy_clk>;
		clock-names = "core_clk", "phy_clk";
	};
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/ufs/cdns,ufshc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Cadence Universal Flash Storage (UFS) Controller

maintainers:
  - Jan Kotas <jank@cadence.com>

# Select only our matches, not all jedec,ufs-2.0
select:
  properties:
    compatible:
      contains:
        enum:
          - cdns,ufshc
          - cdns,ufshc-m31-16nm
  required:
    - compatible

allOf:
  - $ref: ufs-common.yaml

properties:
  compatible:
    items:
      - enum:
          - cdns,ufshc
            # CDNS UFS HC + M31 16nm PHY
          - cdns,ufshc-m31-16nm
      - const: jedec,ufs-2.0

  clocks:
    minItems: 1
    maxItems: 3

  clock-names:
    minItems: 1
    items:
      - const: core_clk
      - const: phy_clk
      - const: ref_clk

  reg:
    maxItems: 1

required:
  - compatible
  - clocks
  - clock-names
  - reg

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    ufs@fd030000 {
        compatible = "cdns,ufshc", "jedec,ufs-2.0";
        reg = <0xfd030000 0x10000>;
        interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
        freq-table-hz = <0 0>, <0 0>;
        clocks = <&ufs_core_clk>, <&ufs_phy_clk>;
        clock-names = "core_clk", "phy_clk";
    };
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@@ -47,11 +47,10 @@ required:


patternProperties:
patternProperties:
  "^ufs@[0-9a-f]+$":
  "^ufs@[0-9a-f]+$":
    type: object
    $ref: cdns,ufshc.yaml
    description: |
    description: |
      Cadence UFS controller node must be the child node. Refer
      Cadence UFS controller node must be the child node.
      Documentation/devicetree/bindings/ufs/cdns,ufshc.txt for binding
    unevaluatedProperties: false
      documentation of child node


additionalProperties: false
additionalProperties: false