Commit 1614c862 authored by Wolfram Sang's avatar Wolfram Sang Committed by Geert Uytterhoeven
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arm64: dts: renesas: spider-cpu: Enable SCIF0 on second connector 



The schematics label it as SCIF0 debug port.

Signed-off-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220614193005.2652-1-wsa+renesas@sang-engineering.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 40753144

arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi

+13 −0
Original line number Diff line number Diff line
@@ -60,6 +60,11 @@ scif3_pins: scif3 { 
		function = "scif3";

	};



	scif0_pins: scif0 {

		groups = "scif0_data", "scif0_ctrl";

		function = "scif0";

	};



	scif_clk_pins: scif_clk {

		groups = "scif_clk";

		function = "scif_clk";
@@ -79,6 +84,14 @@ &scif3 { 
	status = "okay";

};



&scif0 {

	pinctrl-0 = <&scif0_pins>;

	pinctrl-names = "default";



	uart-has-rtscts;

	status = "okay";

};



&scif_clk {

	clock-frequency = <24000000>;

};

arch/arm64/boot/dts/renesas/r8a779f0-spider.dts

+1 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ / { 


	aliases {

		serial0 = &scif3;

		serial1 = &scif0;

	};



	chosen {