Commit 178984d8 authored by Anson Huang's avatar Anson Huang Committed by Rob Herring
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dt-bindings: serial: Convert NXP lpuart to json-schema



Convert the NXP lpuart binding to DT schema format using json-schema.

Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Link: https://lore.kernel.org/r/1597721685-9280-5-git-send-email-Anson.Huang@nxp.com


Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 66f669d6
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* Freescale low power universal asynchronous receiver/transmitter (lpuart)

Required properties:
- compatible :
  - "fsl,vf610-lpuart" for lpuart compatible with the one integrated
    on Vybrid vf610 SoC with 8-bit register organization
  - "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated
    on LS1021A SoC with 32-bit big-endian register organization
  - "fsl,ls1028a-lpuart" for lpuart compatible with the one integrated
    on LS1028A SoC with 32-bit little-endian register organization
  - "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated
    on i.MX7ULP SoC with 32-bit little-endian register organization
  - "fsl,imx8qxp-lpuart" for lpuart compatible with the one integrated
    on i.MX8QXP SoC with 32-bit little-endian register organization
  - "fsl,imx8qm-lpuart" for lpuart compatible with the one integrated
    on i.MX8QM SoC with 32-bit little-endian register organization
- reg : Address and length of the register set for the device
- interrupts : Should contain uart interrupt
- clocks : phandle + clock specifier pairs, one for each entry in clock-names
- clock-names : For vf610/ls1021a/ls1028a/imx7ulp, "ipg" clock is for uart
  bus/baud clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used
  to access lpuart controller registers, it also requires "baud" clock for
  module to receive/transmit data.

Optional properties:
- dmas: A list of two dma specifiers, one for each entry in dma-names.
- dma-names: should contain "tx" and "rx".
- rs485-rts-active-low, linux,rs485-enabled-at-boot-time: see rs485.txt

Note: Optional properties for DMA support. Write them both or both not.

Example:

uart0: serial@40027000 {
		compatible = "fsl,vf610-lpuart";
		reg = <0x40027000 0x1000>;
		interrupts = <0 61 0x00>;
		clocks = <&clks VF610_CLK_UART0>;
		clock-names = "ipg";
		dmas = <&edma0 0 2>,
			<&edma0 0 3>;
		dma-names = "rx","tx";
	};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/serial/fsl-lpuart.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale low power universal asynchronous receiver/transmitter (lpuart)

maintainers:
  - Fugang Duan <fugang.duan@nxp.com>

allOf:
  - $ref: "rs485.yaml"

properties:
  compatible:
    enum:
      - fsl,vf610-lpuart
      - fsl,ls1021a-lpuart
      - fsl,ls1028a-lpuart
      - fsl,imx7ulp-lpuart
      - fsl,imx8qxp-lpuart
      - fsl,imx8qm-lpuart

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: ipg clock
      - description: baud clock
    minItems: 1
    maxItems: 2

  clock-names:
    items:
      - const: ipg
      - const: baud
    minItems: 1
    maxItems: 2

  dmas:
    items:
      - description: DMA controller phandle and request line for RX
      - description: DMA controller phandle and request line for TX

  dma-names:
    items:
      - const: rx
      - const: tx

  rs485-rts-active-low: true
  linux,rs485-enabled-at-boot-time: true

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/vf610-clock.h>

    serial@40027000 {
        compatible = "fsl,vf610-lpuart";
        reg = <0x40027000 0x1000>;
        interrupts = <0 61 0x00>;
        clocks = <&clks VF610_CLK_UART0>;
        clock-names = "ipg";
        dmas = <&edma0 0 2>, <&edma0 0 3>;
        dma-names = "rx","tx";
    };