Commit 18b542e5 authored by Tomeu Vizoso's avatar Tomeu Vizoso Committed by Neil Armstrong
Browse files

arm64: dts: Add DT node for the VIPNano-QI on the A311D



This "NPU" is very similar to the Vivante GPUs and Etnaviv works well
with it with just a few small changes.

v2: Add reference to RESET_NNA (Neil)
v3: Fix indentation (Neil)

Signed-off-by: default avatarTomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20221202115223.39051-5-tomeu.vizoso@collabora.com


[narmstrong: squash patch 8, disable NPU by default and do not enable NPU on vim3 yet]
Signed-off-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
parent 52b94e47
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+10 −0
Original line number Diff line number Diff line
@@ -2490,4 +2490,14 @@ xtal: xtal-clk {
		#clock-cells = <0>;
	};

	npu: npu@ff100000 {
		compatible = "vivante,gc";
		reg = <0x0 0xff100000 0x0 0x20000>;
		interrupts = <0 147 4>;
		clocks = <&clkc CLKID_NNA_CORE_CLK>,
			 <&clkc CLKID_NNA_AXI_CLK>;
		clock-names = "core", "bus";
		resets = <&reset RESET_NNA>;
		status = "disabled";
	};
};
+4 −0
Original line number Diff line number Diff line
@@ -144,3 +144,7 @@ &mali {
&pmu {
	compatible = "amlogic,g12b-ddr-pmu";
};

&npu {
	power-domains = <&pwrc PWRC_G12A_NNA_ID>;
};
+4 −0
Original line number Diff line number Diff line
@@ -548,3 +548,7 @@ &vpu {
&usb {
	power-domains = <&pwrc PWRC_SM1_USB_ID>;
};

&npu {
	power-domains = <&pwrc PWRC_SM1_NNA_ID>;
};