Commit 1918693f authored by Vineet Gupta's avatar Vineet Gupta
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ARCv2: memset: don't prefetch for len == 0 which happens a alot 



This avoids potential "bleeding" when size == 0 as cache line would be
dirtied (and possibly fetched from other cores) and due to the same
reaons more optimal too.

Signed-off-by: default avatarVineet Gupta <vgupta@kernel.org>
parent c8ee610a

arch/arc/lib/memset-archs.S

+2 −1
Original line number Diff line number Diff line
@@ -36,12 +36,13 @@ 
#endif



ENTRY_CFI(memset)

	PREFETCHW_INSTR	r0, 0	; Prefetch the first write location

	mov.f	0, r2

;;; if size is zero

	jz.d	[blink]

	mov	r3, r0		; don't clobber ret val



	PREFETCHW_INSTR	r0, 0	; Prefetch the first write location



;;; if length < 8

	brls.d.nt	r2, 8, .Lsmallchunk

	mov.f	lp_count,r2