Commit 1b9f0ec8 authored by Alexandre Torgue's avatar Alexandre Torgue
Browse files

ARM: dts: stm32: fix spi1 pin assignment on stm32mp15 



Bank A and B IOs can't be handled by the pin controller 'Z'. This patch
assign spi1 pin definition to the correct controller.

Fixes: 9ad65d24 ("ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group")

Signed-off-by: default avatarAlexandre Torgue <alexandre.torgue@foss.st.com>
parent 0fbb60de

arch/arm/boot/dts/stm32mp15-pinctrl.dtsi

+15 −15
Original line number Diff line number Diff line
@@ -1880,6 +1880,21 @@ pins { 
		};

	};



	spi1_pins_b: spi1-1 {

		pins1 {

			pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */

				 <STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */

			bias-disable;

			drive-push-pull;

			slew-rate = <1>;

		};



		pins2 {

			pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */

			bias-disable;

		};

	};



	spi2_pins_a: spi2-0 {

		pins1 {

			pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI2_SCK */
@@ -2448,19 +2463,4 @@ pins2 { 
			bias-disable;

		};

	};



	spi1_pins_b: spi1-1 {

		pins1 {

			pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */

				 <STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */

			bias-disable;

			drive-push-pull;

			slew-rate = <1>;

		};



		pins2 {

			pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */

			bias-disable;

		};

	};

};