Commit 1ba90924 authored by Pali Rohár's avatar Pali Rohár Committed by Gregory CLEMENT
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ARM: dts: armada-xp-mv78460.dtsi: Add definitions for PCIe legacy INTx interrupts 



Add definitions for PCIe legacy INTx interrupts.

This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.

Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Signed-off-by: default avatarMarek Behún <kabel@kernel.org>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@bootlin.com>
parent 2561806f

arch/arm/boot/dts/armada-xp-mv78460.dtsi

+120 −20
Original line number Diff line number Diff line
@@ -119,16 +119,26 @@ pcie1: pcie@1,0 { 
				reg = <0x0800 0 0 0 0>;

				#address-cells = <3>;

				#size-cells = <2>;

				interrupt-names = "intx";

				interrupts-extended = <&mpic 58>;

				#interrupt-cells = <1>;

				ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0

					  0x81000000 0 0 0x81000000 0x1 0 1 0>;

				bus-range = <0x00 0xff>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &mpic 58>;

				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &pcie1_intc 0>,

						<0 0 0 2 &pcie1_intc 1>,

						<0 0 0 3 &pcie1_intc 2>,

						<0 0 0 4 &pcie1_intc 3>;

				marvell,pcie-port = <0>;

				marvell,pcie-lane = <0>;

				clocks = <&gateclk 5>;

				status = "disabled";



				pcie1_intc: interrupt-controller {

					interrupt-controller;

					#interrupt-cells = <1>;

				};

			};



			pcie2: pcie@2,0 {
@@ -137,16 +147,26 @@ pcie2: pcie@2,0 { 
				reg = <0x1000 0 0 0 0>;

				#address-cells = <3>;

				#size-cells = <2>;

				interrupt-names = "intx";

				interrupts-extended = <&mpic 59>;

				#interrupt-cells = <1>;

				ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0

					  0x81000000 0 0 0x81000000 0x2 0 1 0>;

				bus-range = <0x00 0xff>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &mpic 59>;

				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &pcie2_intc 0>,

						<0 0 0 2 &pcie2_intc 1>,

						<0 0 0 3 &pcie2_intc 2>,

						<0 0 0 4 &pcie2_intc 3>;

				marvell,pcie-port = <0>;

				marvell,pcie-lane = <1>;

				clocks = <&gateclk 6>;

				status = "disabled";



				pcie2_intc: interrupt-controller {

					interrupt-controller;

					#interrupt-cells = <1>;

				};

			};



			pcie3: pcie@3,0 {
@@ -155,16 +175,26 @@ pcie3: pcie@3,0 { 
				reg = <0x1800 0 0 0 0>;

				#address-cells = <3>;

				#size-cells = <2>;

				interrupt-names = "intx";

				interrupts-extended = <&mpic 60>;

				#interrupt-cells = <1>;

				ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0

					  0x81000000 0 0 0x81000000 0x3 0 1 0>;

				bus-range = <0x00 0xff>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &mpic 60>;

				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &pcie3_intc 0>,

						<0 0 0 2 &pcie3_intc 1>,

						<0 0 0 3 &pcie3_intc 2>,

						<0 0 0 4 &pcie3_intc 3>;

				marvell,pcie-port = <0>;

				marvell,pcie-lane = <2>;

				clocks = <&gateclk 7>;

				status = "disabled";



				pcie3_intc: interrupt-controller {

					interrupt-controller;

					#interrupt-cells = <1>;

				};

			};



			pcie4: pcie@4,0 {
@@ -173,16 +203,26 @@ pcie4: pcie@4,0 { 
				reg = <0x2000 0 0 0 0>;

				#address-cells = <3>;

				#size-cells = <2>;

				interrupt-names = "intx";

				interrupts-extended = <&mpic 61>;

				#interrupt-cells = <1>;

				ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0

					  0x81000000 0 0 0x81000000 0x4 0 1 0>;

				bus-range = <0x00 0xff>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &mpic 61>;

				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &pcie4_intc 0>,

						<0 0 0 2 &pcie4_intc 1>,

						<0 0 0 3 &pcie4_intc 2>,

						<0 0 0 4 &pcie4_intc 3>;

				marvell,pcie-port = <0>;

				marvell,pcie-lane = <3>;

				clocks = <&gateclk 8>;

				status = "disabled";



				pcie4_intc: interrupt-controller {

					interrupt-controller;

					#interrupt-cells = <1>;

				};

			};



			pcie5: pcie@5,0 {
@@ -191,16 +231,26 @@ pcie5: pcie@5,0 { 
				reg = <0x2800 0 0 0 0>;

				#address-cells = <3>;

				#size-cells = <2>;

				interrupt-names = "intx";

				interrupts-extended = <&mpic 62>;

				#interrupt-cells = <1>;

				ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0

					  0x81000000 0 0 0x81000000 0x5 0 1 0>;

				bus-range = <0x00 0xff>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &mpic 62>;

				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &pcie5_intc 0>,

						<0 0 0 2 &pcie5_intc 1>,

						<0 0 0 3 &pcie5_intc 2>,

						<0 0 0 4 &pcie5_intc 3>;

				marvell,pcie-port = <1>;

				marvell,pcie-lane = <0>;

				clocks = <&gateclk 9>;

				status = "disabled";



				pcie5_intc: interrupt-controller {

					interrupt-controller;

					#interrupt-cells = <1>;

				};

			};



			pcie6: pcie@6,0 {
@@ -209,16 +259,26 @@ pcie6: pcie@6,0 { 
				reg = <0x3000 0 0 0 0>;

				#address-cells = <3>;

				#size-cells = <2>;

				interrupt-names = "intx";

				interrupts-extended = <&mpic 63>;

				#interrupt-cells = <1>;

				ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0

					  0x81000000 0 0 0x81000000 0x6 0 1 0>;

				bus-range = <0x00 0xff>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &mpic 63>;

				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &pcie6_intc 0>,

						<0 0 0 2 &pcie6_intc 1>,

						<0 0 0 3 &pcie6_intc 2>,

						<0 0 0 4 &pcie6_intc 3>;

				marvell,pcie-port = <1>;

				marvell,pcie-lane = <1>;

				clocks = <&gateclk 10>;

				status = "disabled";



				pcie6_intc: interrupt-controller {

					interrupt-controller;

					#interrupt-cells = <1>;

				};

			};



			pcie7: pcie@7,0 {
@@ -227,16 +287,26 @@ pcie7: pcie@7,0 { 
				reg = <0x3800 0 0 0 0>;

				#address-cells = <3>;

				#size-cells = <2>;

				interrupt-names = "intx";

				interrupts-extended = <&mpic 64>;

				#interrupt-cells = <1>;

				ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0

					  0x81000000 0 0 0x81000000 0x7 0 1 0>;

				bus-range = <0x00 0xff>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &mpic 64>;

				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &pcie7_intc 0>,

						<0 0 0 2 &pcie7_intc 1>,

						<0 0 0 3 &pcie7_intc 2>,

						<0 0 0 4 &pcie7_intc 3>;

				marvell,pcie-port = <1>;

				marvell,pcie-lane = <2>;

				clocks = <&gateclk 11>;

				status = "disabled";



				pcie7_intc: interrupt-controller {

					interrupt-controller;

					#interrupt-cells = <1>;

				};

			};



			pcie8: pcie@8,0 {
@@ -245,16 +315,26 @@ pcie8: pcie@8,0 { 
				reg = <0x4000 0 0 0 0>;

				#address-cells = <3>;

				#size-cells = <2>;

				interrupt-names = "intx";

				interrupts-extended = <&mpic 65>;

				#interrupt-cells = <1>;

				ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0

					  0x81000000 0 0 0x81000000 0x8 0 1 0>;

				bus-range = <0x00 0xff>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &mpic 65>;

				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &pcie8_intc 0>,

						<0 0 0 2 &pcie8_intc 1>,

						<0 0 0 3 &pcie8_intc 2>,

						<0 0 0 4 &pcie8_intc 3>;

				marvell,pcie-port = <1>;

				marvell,pcie-lane = <3>;

				clocks = <&gateclk 12>;

				status = "disabled";



				pcie8_intc: interrupt-controller {

					interrupt-controller;

					#interrupt-cells = <1>;

				};

			};



			pcie9: pcie@9,0 {
@@ -263,16 +343,26 @@ pcie9: pcie@9,0 { 
				reg = <0x4800 0 0 0 0>;

				#address-cells = <3>;

				#size-cells = <2>;

				interrupt-names = "intx";

				interrupts-extended = <&mpic 99>;

				#interrupt-cells = <1>;

				ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0

					  0x81000000 0 0 0x81000000 0x9 0 1 0>;

				bus-range = <0x00 0xff>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &mpic 99>;

				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &pcie9_intc 0>,

						<0 0 0 2 &pcie9_intc 1>,

						<0 0 0 3 &pcie9_intc 2>,

						<0 0 0 4 &pcie9_intc 3>;

				marvell,pcie-port = <2>;

				marvell,pcie-lane = <0>;

				clocks = <&gateclk 26>;

				status = "disabled";



				pcie9_intc: interrupt-controller {

					interrupt-controller;

					#interrupt-cells = <1>;

				};

			};



			pcie10: pcie@a,0 {
@@ -281,16 +371,26 @@ pcie10: pcie@a,0 { 
				reg = <0x5000 0 0 0 0>;

				#address-cells = <3>;

				#size-cells = <2>;

				interrupt-names = "intx";

				interrupts-extended = <&mpic 103>;

				#interrupt-cells = <1>;

				ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0

					  0x81000000 0 0 0x81000000 0xa 0 1 0>;

				bus-range = <0x00 0xff>;

				interrupt-map-mask = <0 0 0 0>;

				interrupt-map = <0 0 0 0 &mpic 103>;

				interrupt-map-mask = <0 0 0 7>;

				interrupt-map = <0 0 0 1 &pcie10_intc 0>,

						<0 0 0 2 &pcie10_intc 1>,

						<0 0 0 3 &pcie10_intc 2>,

						<0 0 0 4 &pcie10_intc 3>;

				marvell,pcie-port = <3>;

				marvell,pcie-lane = <0>;

				clocks = <&gateclk 27>;

				status = "disabled";



				pcie10_intc: interrupt-controller {

					interrupt-controller;

					#interrupt-cells = <1>;

				};

			};

		};