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Commit 1cc45515 authored by Swapnil Jakhade's avatar Swapnil Jakhade Committed by Vinod Koul
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phy: cadence-torrent: Add PHY configuration for DP with 100MHz ref clock 



Add PHY configuration registers for single link DP with 100MHz reference
clock and NO_SSC.

Signed-off-by: default avatarSwapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20210728145454.15945-7-sjakhade@cadence.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent da055e55
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