Commit 1d5ca713 authored by Likun Gao's avatar Likun Gao Committed by Alex Deucher
Browse files

drm/amd/powerplay: support to get power index for sienna_cichlid 



Add function to get smu power index for sienna_cichlid.

Signed-off-by: default avatarLikun Gao <Likun.Gao@amd.com>
Reviewed-by: default avatarKenneth Feng <kenneth.feng@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1c58d429

drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c

+21 −0
Original line number Diff line number Diff line
@@ -176,6 +176,11 @@ static struct smu_11_0_cmn2aisc_mapping sienna_cichlid_table_map[SMU_TABLE_COUNT 
	TAB_MAP(PACE),

};



static struct smu_11_0_cmn2aisc_mapping sienna_cichlid_pwr_src_map[SMU_POWER_SOURCE_COUNT] = {

	PWR_MAP(AC),

	PWR_MAP(DC),

};



static struct smu_11_0_cmn2aisc_mapping sienna_cichlid_workload_map[PP_SMC_POWER_PROFILE_COUNT] = {

	WORKLOAD_MAP(PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT,	WORKLOAD_PPLIB_DEFAULT_BIT),

	WORKLOAD_MAP(PP_SMC_POWER_PROFILE_FULLSCREEN3D,		WORKLOAD_PPLIB_FULL_SCREEN_3D_BIT),
@@ -246,6 +251,21 @@ static int sienna_cichlid_get_smu_table_index(struct smu_context *smc, uint32_t 
	return mapping.map_to;

}



static int sienna_cichlid_get_pwr_src_index(struct smu_context *smc, uint32_t index)

{

	struct smu_11_0_cmn2aisc_mapping mapping;



	if (index >= SMU_POWER_SOURCE_COUNT)

		return -EINVAL;



	mapping = sienna_cichlid_pwr_src_map[index];

	if (!(mapping.valid_mapping)) {

		return -EINVAL;

	}



	return mapping.map_to;

}



static int sienna_cichlid_get_workload_type(struct smu_context *smu, enum PP_SMC_POWER_PROFILE profile)

{

	struct smu_11_0_cmn2aisc_mapping mapping;
@@ -2185,6 +2205,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = { 
	.get_smu_clk_index = sienna_cichlid_get_smu_clk_index,

	.get_smu_feature_index = sienna_cichlid_get_smu_feature_index,

	.get_smu_table_index = sienna_cichlid_get_smu_table_index,

	.get_smu_power_index = sienna_cichlid_get_pwr_src_index,

	.get_workload_type = sienna_cichlid_get_workload_type,

	.get_allowed_feature_mask = sienna_cichlid_get_allowed_feature_mask,

	.set_default_dpm_table = sienna_cichlid_set_default_dpm_table,

drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.h

+6 −0
Original line number Diff line number Diff line
@@ -23,6 +23,12 @@ 
#ifndef __SIENNA_CICHLID_PPT_H__

#define __SIENNA_CICHLID_PPT_H__



typedef enum {

  POWER_SOURCE_AC,

  POWER_SOURCE_DC,

  POWER_SOURCE_COUNT,

} POWER_SOURCE_e;



extern void sienna_cichlid_set_ppt_funcs(struct smu_context *smu);



#define smnPCIE_LC_SPEED_CNTL                   0x11140290