Unverified Commit 1e400cb9 authored by Rajan Vaja's avatar Rajan Vaja Committed by Mark Brown
Browse files

firmware: xilinx: Add qspi firmware interface 



Add support for QSPI ioctl functions and enums.

Signed-off-by: default avatarRajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: default avatarMichal Simek <michal.simek@amd.com>
Signed-off-by: default avatarAmit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
Link: https://lore.kernel.org/r/20221011062040.12116-5-amit.kumar-mahapatra@amd.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 21764a49

drivers/firmware/xilinx/zynqmp.c

+7 −0
Original line number Diff line number Diff line
@@ -843,6 +843,13 @@ int zynqmp_pm_read_pggs(u32 index, u32 *value) 
}

EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs);



int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value)

{

	return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_TAPDELAY_BYPASS,

				   index, value, NULL);

}

EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass);



/**

 * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status

 * @value:	Status value to be written

include/linux/firmware/xlnx-zynqmp.h

+19 −0
Original line number Diff line number Diff line
@@ -135,6 +135,7 @@ enum pm_ret_status { 
};



enum pm_ioctl_id {

	IOCTL_SET_TAPDELAY_BYPASS = 4,

	IOCTL_SD_DLL_RESET = 6,

	IOCTL_SET_SD_TAPDELAY = 7,

	IOCTL_SET_PLL_FRAC_MODE = 8,
@@ -389,6 +390,18 @@ enum zynqmp_pm_shutdown_subtype { 
	ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM = 2,

};



enum tap_delay_signal_type {

	PM_TAPDELAY_NAND_DQS_IN = 0,

	PM_TAPDELAY_NAND_DQS_OUT = 1,

	PM_TAPDELAY_QSPI = 2,

	PM_TAPDELAY_MAX = 3,

};



enum tap_delay_bypass_ctrl {

	PM_TAPDELAY_BYPASS_DISABLE = 0,

	PM_TAPDELAY_BYPASS_ENABLE = 1,

};



enum ospi_mux_select_type {

	PM_OSPI_MUX_SEL_DMA = 0,

	PM_OSPI_MUX_SEL_LINEAR = 1,
@@ -484,6 +497,7 @@ int zynqmp_pm_write_ggs(u32 index, u32 value); 
int zynqmp_pm_read_ggs(u32 index, u32 *value);

int zynqmp_pm_write_pggs(u32 index, u32 value);

int zynqmp_pm_read_pggs(u32 index, u32 *value);

int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value);

int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype);

int zynqmp_pm_set_boot_health_status(u32 value);

int zynqmp_pm_pinctrl_request(const u32 pin);
@@ -696,6 +710,11 @@ static inline int zynqmp_pm_read_pggs(u32 index, u32 *value) 
	return -ENODEV;

}



static inline int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value)

{

	return -ENODEV;

}



static inline int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype)

{

	return -ENODEV;