Commit 1e52a7e6 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Ulf Hansson
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dt-bindings: mmc: drop unneeded quotes



Cleanup by removing unneeded quotes from refs and redundant blank lines.
No functional impact except adjusting to preferred coding style.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> # for Renesas controllers
Reviewed-by: default avatarHeiko Stuebner <heiko@sntech.de>
Reviewed-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Acked-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230120085722.171965-1-krzysztof.kozlowski@linaro.org


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent c6ecb0f8
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+1 −1
Original line number Original line Diff line number Diff line
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 MMC Controller
title: Allwinner A10 MMC Controller


allOf:
allOf:
  - $ref: "mmc-controller.yaml"
  - $ref: mmc-controller.yaml


maintainers:
maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Chen-Yu Tsai <wens@csie.org>
+1 −1
Original line number Original line Diff line number Diff line
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic Meson SDHC controller
title: Amlogic Meson SDHC controller


allOf:
allOf:
  - $ref: "mmc-controller.yaml"
  - $ref: mmc-controller.yaml


maintainers:
maintainers:
  - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
  - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+3 −3
Original line number Original line Diff line number Diff line
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
%YAML 1.2
---
---
$id: "http://devicetree.org/schemas/mmc/arasan,sdhci.yaml#"
$id: http://devicetree.org/schemas/mmc/arasan,sdhci.yaml#
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$schema: http://devicetree.org/meta-schemas/core.yaml#


title: Arasan SDHCI Controller
title: Arasan SDHCI Controller


@@ -10,7 +10,7 @@ maintainers:
  - Adrian Hunter <adrian.hunter@intel.com>
  - Adrian Hunter <adrian.hunter@intel.com>


allOf:
allOf:
  - $ref: "mmc-controller.yaml#"
  - $ref: mmc-controller.yaml#
  - if:
  - if:
      properties:
      properties:
        compatible:
        compatible:
+11 −11
Original line number Original line Diff line number Diff line
@@ -36,43 +36,43 @@ properties:


  cdns,phy-input-delay-sd-highspeed:
  cdns,phy-input-delay-sd-highspeed:
    description: Value of the delay in the input path for SD high-speed timing
    description: Value of the delay in the input path for SD high-speed timing
    $ref: "/schemas/types.yaml#/definitions/uint32"
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    minimum: 0
    maximum: 0x1f
    maximum: 0x1f


  cdns,phy-input-delay-legacy:
  cdns,phy-input-delay-legacy:
    description: Value of the delay in the input path for legacy timing
    description: Value of the delay in the input path for legacy timing
    $ref: "/schemas/types.yaml#/definitions/uint32"
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    minimum: 0
    maximum: 0x1f
    maximum: 0x1f


  cdns,phy-input-delay-sd-uhs-sdr12:
  cdns,phy-input-delay-sd-uhs-sdr12:
    description: Value of the delay in the input path for SD UHS SDR12 timing
    description: Value of the delay in the input path for SD UHS SDR12 timing
    $ref: "/schemas/types.yaml#/definitions/uint32"
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    minimum: 0
    maximum: 0x1f
    maximum: 0x1f


  cdns,phy-input-delay-sd-uhs-sdr25:
  cdns,phy-input-delay-sd-uhs-sdr25:
    description: Value of the delay in the input path for SD UHS SDR25 timing
    description: Value of the delay in the input path for SD UHS SDR25 timing
    $ref: "/schemas/types.yaml#/definitions/uint32"
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    minimum: 0
    maximum: 0x1f
    maximum: 0x1f


  cdns,phy-input-delay-sd-uhs-sdr50:
  cdns,phy-input-delay-sd-uhs-sdr50:
    description: Value of the delay in the input path for SD UHS SDR50 timing
    description: Value of the delay in the input path for SD UHS SDR50 timing
    $ref: "/schemas/types.yaml#/definitions/uint32"
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    minimum: 0
    maximum: 0x1f
    maximum: 0x1f


  cdns,phy-input-delay-sd-uhs-ddr50:
  cdns,phy-input-delay-sd-uhs-ddr50:
    description: Value of the delay in the input path for SD UHS DDR50 timing
    description: Value of the delay in the input path for SD UHS DDR50 timing
    $ref: "/schemas/types.yaml#/definitions/uint32"
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    minimum: 0
    maximum: 0x1f
    maximum: 0x1f


  cdns,phy-input-delay-mmc-highspeed:
  cdns,phy-input-delay-mmc-highspeed:
    description: Value of the delay in the input path for MMC high-speed timing
    description: Value of the delay in the input path for MMC high-speed timing
    $ref: "/schemas/types.yaml#/definitions/uint32"
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    minimum: 0
    maximum: 0x1f
    maximum: 0x1f


@@ -83,7 +83,7 @@ properties:
  # Each delay property represents the fraction of the clock period.
  # Each delay property represents the fraction of the clock period.
  # The approximate delay value will be
  # The approximate delay value will be
  # (<delay property value>/128)*sdmclk_clock_period.
  # (<delay property value>/128)*sdmclk_clock_period.
    $ref: "/schemas/types.yaml#/definitions/uint32"
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    minimum: 0
    maximum: 0x1f
    maximum: 0x1f


@@ -91,7 +91,7 @@ properties:
    description: |
    description: |
      Value of the delay introduced on the sdclk output for all modes except
      Value of the delay introduced on the sdclk output for all modes except
      HS200, HS400 and HS400_ES.
      HS200, HS400 and HS400_ES.
    $ref: "/schemas/types.yaml#/definitions/uint32"
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    minimum: 0
    maximum: 0x7f
    maximum: 0x7f


@@ -99,7 +99,7 @@ properties:
    description: |
    description: |
      Value of the delay introduced on the sdclk output for HS200, HS400 and
      Value of the delay introduced on the sdclk output for HS200, HS400 and
      HS400_ES speed modes.
      HS400_ES speed modes.
    $ref: "/schemas/types.yaml#/definitions/uint32"
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    minimum: 0
    maximum: 0x7f
    maximum: 0x7f


@@ -107,7 +107,7 @@ properties:
    description: |
    description: |
      Value of the delay introduced on the dat_strobe input used in
      Value of the delay introduced on the dat_strobe input used in
      HS400 / HS400_ES speed modes.
      HS400 / HS400_ES speed modes.
    $ref: "/schemas/types.yaml#/definitions/uint32"
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    minimum: 0
    maximum: 0x7f
    maximum: 0x7f


+2 −2
Original line number Original line Diff line number Diff line
@@ -10,7 +10,7 @@ maintainers:
  - Shawn Guo <shawnguo@kernel.org>
  - Shawn Guo <shawnguo@kernel.org>


allOf:
allOf:
  - $ref: "mmc-controller.yaml"
  - $ref: mmc-controller.yaml


description: |
description: |
  The Enhanced Secure Digital Host Controller on Freescale i.MX family
  The Enhanced Secure Digital Host Controller on Freescale i.MX family
@@ -112,7 +112,7 @@ properties:
    default: 0
    default: 0


  voltage-ranges:
  voltage-ranges:
    $ref: '/schemas/types.yaml#/definitions/uint32-matrix'
    $ref: /schemas/types.yaml#/definitions/uint32-matrix
    description: |
    description: |
      Specify the voltage range in case there are software transparent level
      Specify the voltage range in case there are software transparent level
      shifters on the outputs of the controller. Two cells are required, first
      shifters on the outputs of the controller. Two cells are required, first
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