Commit 22598cfc authored by Jessica Zhang's avatar Jessica Zhang Committed by Dmitry Baryshkov
Browse files

drm/msm/dpu: Add DPU_INTF_DATA_COMPRESS feature flag for DPU >= 7.0 



In DPU 7.x and later, DSC/DCE enablement registers have been moved from
PINGPONG to INTF. Thus, add a DPU_INTF_DATA_COMPRESS feature flag that will
be set if the DATA_COMPRESS register is in the INTF block.

Reviewed-by: default avatarMarijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: default avatarJessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/541967/
Link: https://lore.kernel.org/r/20230405-add-dsc-support-v6-3-95eab864d1b6@quicinc.com


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent 7c9e4a55

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

+1 −1
Original line number Diff line number Diff line
@@ -105,7 +105,7 @@ 
	 BIT(DPU_INTF_STATUS_SUPPORTED) | \

	 BIT(DPU_DATA_HCTL_EN))



#define INTF_SC7280_MASK (INTF_SC7180_MASK)

#define INTF_SC7280_MASK (INTF_SC7180_MASK | BIT(DPU_INTF_DATA_COMPRESS))



#define WB_SM8250_MASK (BIT(DPU_WB_LINE_MODE) | \

			 BIT(DPU_WB_UBWC) | \

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h

+2 −0
Original line number Diff line number Diff line
@@ -181,6 +181,7 @@ enum { 
 * @DPU_DATA_HCTL_EN                Allows data to be transferred at different rate

 *                                  than video timing

 * @DPU_INTF_STATUS_SUPPORTED       INTF block has INTF_STATUS register

 * @DPU_INTF_DATA_COMPRESS          INTF block has DATA_COMPRESS register

 * @DPU_INTF_MAX

 */

enum {
@@ -188,6 +189,7 @@ enum { 
	DPU_INTF_TE,

	DPU_DATA_HCTL_EN,

	DPU_INTF_STATUS_SUPPORTED,

	DPU_INTF_DATA_COMPRESS,

	DPU_INTF_MAX

};