Commit 23c81e7a authored by Jonathan Cameron's avatar Jonathan Cameron
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iio: adc: ti-adc128s052: Fix alignment for DMA safety 



____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 913b8646 ("iio: adc: Add TI ADC128S052")
Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: default avatarNuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-33-jic23@kernel.org
parent 76890c3b

drivers/iio/adc/ti-adc128s052.c

+1 −1
Original line number Diff line number Diff line
@@ -29,7 +29,7 @@ struct adc128 { 
	struct regulator *reg;

	struct mutex lock;



	u8 buffer[2] ____cacheline_aligned;

	u8 buffer[2] __aligned(IIO_DMA_MINALIGN);

};



static int adc128_adc_conversion(struct adc128 *adc, u8 channel)