Commit 23f59eb1 authored by Richard Zhu's avatar Richard Zhu Committed by Shawn Guo
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arm64: dts: Add i.MX8MP PCIe EP support 



Add i.MX8MP PCIe EP support.

Signed-off-by: default avatarRichard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 1601bb45

arch/arm64/boot/dts/freescale/imx8mp.dtsi

+26 −0
Original line number Diff line number Diff line
@@ -1309,6 +1309,32 @@ pcie: pcie@33800000 { 
			status = "disabled";

		};



		pcie_ep: pcie-ep@33800000 {

			compatible = "fsl,imx8mp-pcie-ep";

			reg = <0x33800000 0x000400000>, <0x18000000 0x08000000>;

			reg-names = "dbi", "addr_space";

			clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,

				 <&clk IMX8MP_CLK_HSIO_AXI>,

				 <&clk IMX8MP_CLK_PCIE_ROOT>;

			clock-names = "pcie", "pcie_bus", "pcie_aux";

			assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>;

			assigned-clock-rates = <10000000>;

			assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>;

			num-lanes = <1>;

			interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; /* eDMA */

			interrupt-names = "dma";

			fsl,max-link-speed = <3>;

			power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_PCIE>;

			resets = <&src IMX8MP_RESET_PCIE_CTRL_APPS_EN>,

				 <&src IMX8MP_RESET_PCIE_CTRL_APPS_TURNOFF>;

			reset-names = "apps", "turnoff";

			phys = <&pcie_phy>;

			phy-names = "pcie-phy";

			num-ib-windows = <4>;

			num-ob-windows = <4>;

			status = "disabled";

		};



		gpu3d: gpu@38000000 {

			compatible = "vivante,gc";

			reg = <0x38000000 0x8000>;