Commit 24cab82c authored by Marc Zyngier's avatar Marc Zyngier
Browse files

KVM: arm/arm64: vgic: Add LPI translation cache definition 



Add the basic data structure that expresses an MSI to LPI
translation as well as the allocation/release hooks.

The size of the cache is arbitrarily defined as 16*nr_vcpus.

Tested-by: default avatarAndre Przywara <andre.przywara@arm.com>
Reviewed-by: default avatarEric Auger <eric.auger@redhat.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent d45331b0

include/kvm/arm_vgic.h

+3 −0
Original line number Diff line number Diff line
@@ -249,6 +249,9 @@ struct vgic_dist { 
	struct list_head	lpi_list_head;

	int			lpi_list_count;



	/* LPI translation cache */

	struct list_head	lpi_translation_cache;



	/* used by vgic-debug */

	struct vgic_state_iter *iter;

virt/kvm/arm/vgic/vgic-init.c

+5 −0
Original line number Diff line number Diff line
@@ -53,6 +53,7 @@ void kvm_vgic_early_init(struct kvm *kvm) 
	struct vgic_dist *dist = &kvm->arch.vgic;



	INIT_LIST_HEAD(&dist->lpi_list_head);

	INIT_LIST_HEAD(&dist->lpi_translation_cache);

	raw_spin_lock_init(&dist->lpi_list_lock);

}
@@ -294,6 +295,7 @@ int vgic_init(struct kvm *kvm) 
	}



	if (vgic_has_its(kvm)) {

		vgic_lpi_translation_cache_init(kvm);

		ret = vgic_v4_init(kvm);

		if (ret)

			goto out;
@@ -335,6 +337,9 @@ static void kvm_vgic_dist_destroy(struct kvm *kvm) 
		INIT_LIST_HEAD(&dist->rd_regions);

	}



	if (vgic_has_its(kvm))

		vgic_lpi_translation_cache_destroy(kvm);



	if (vgic_supports_direct_msis(kvm))

		vgic_v4_teardown(kvm);

}

virt/kvm/arm/vgic/vgic-its.c

+49 −0
Original line number Diff line number Diff line
@@ -138,6 +138,14 @@ struct its_ite { 
	u32 event_id;

};



struct vgic_translation_cache_entry {

	struct list_head	entry;

	phys_addr_t		db;

	u32			devid;

	u32			eventid;

	struct vgic_irq		*irq;

};



/**

 * struct vgic_its_abi - ITS abi ops and settings

 * @cte_esz: collection table entry size
@@ -1657,6 +1665,45 @@ static int vgic_register_its_iodev(struct kvm *kvm, struct vgic_its *its, 
	return ret;

}



/* Default is 16 cached LPIs per vcpu */

#define LPI_DEFAULT_PCPU_CACHE_SIZE	16



void vgic_lpi_translation_cache_init(struct kvm *kvm)

{

	struct vgic_dist *dist = &kvm->arch.vgic;

	unsigned int sz;

	int i;



	if (!list_empty(&dist->lpi_translation_cache))

		return;



	sz = atomic_read(&kvm->online_vcpus) * LPI_DEFAULT_PCPU_CACHE_SIZE;



	for (i = 0; i < sz; i++) {

		struct vgic_translation_cache_entry *cte;



		/* An allocation failure is not fatal */

		cte = kzalloc(sizeof(*cte), GFP_KERNEL);

		if (WARN_ON(!cte))

			break;



		INIT_LIST_HEAD(&cte->entry);

		list_add(&cte->entry, &dist->lpi_translation_cache);

	}

}



void vgic_lpi_translation_cache_destroy(struct kvm *kvm)

{

	struct vgic_dist *dist = &kvm->arch.vgic;

	struct vgic_translation_cache_entry *cte, *tmp;



	list_for_each_entry_safe(cte, tmp,

				 &dist->lpi_translation_cache, entry) {

		list_del(&cte->entry);

		kfree(cte);

	}

}



#define INITIAL_BASER_VALUE						  \

	(GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb)		| \

	 GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner)		| \
@@ -1685,6 +1732,8 @@ static int vgic_its_create(struct kvm_device *dev, u32 type) 
			kfree(its);

			return ret;

		}



		vgic_lpi_translation_cache_init(dev->kvm);

	}



	mutex_init(&its->its_lock);

virt/kvm/arm/vgic/vgic.h

+2 −0
Original line number Diff line number Diff line
@@ -307,6 +307,8 @@ int vgic_copy_lpi_list(struct kvm *kvm, struct kvm_vcpu *vcpu, u32 **intid_ptr); 
int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its,

			 u32 devid, u32 eventid, struct vgic_irq **irq);

struct vgic_its *vgic_msi_to_its(struct kvm *kvm, struct kvm_msi *msi);

void vgic_lpi_translation_cache_init(struct kvm *kvm);

void vgic_lpi_translation_cache_destroy(struct kvm *kvm);



bool vgic_supports_direct_msis(struct kvm *kvm);

int vgic_v4_init(struct kvm *kvm);