Commit 26888190 authored by Philipp Zabel's avatar Philipp Zabel Committed by Shawn Guo
Browse files

ARM: dts: pfla02: PHY reset is active-low 



Note that the fec driver code currently hard-codes an active-low
reset, regardless of the flags in the device tree.

Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
parent 94a1bbf8

arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi

+3 −1
Original line number Diff line number Diff line
@@ -9,6 +9,8 @@ 
 * http://www.gnu.org/copyleft/gpl.html

 */



#include <dt-bindings/gpio/gpio.h>



/ {

	model = "Phytec phyFLEX-i.MX6 Ouad";

	compatible = "phytec,imx6q-pfla02", "fsl,imx6q";
@@ -289,7 +291,7 @@ &fec { 
	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_enet>;

	phy-mode = "rgmii";

	phy-reset-gpios = <&gpio3 23 0>;

	phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;

	status = "disabled";

};