Commit 27ecdd07 authored by Siddharth Vadapalli's avatar Siddharth Vadapalli Committed by Vinod Koul
Browse files

phy: ti: phy-j721e-wiz: Add SGMII support in wiz driver for J7200 



Select the same mac divider for SGMII too as the one being used for
QSGMII.

Enable full rate divider configuration support for J721E_WIZ_10G for
SGMII.

Signed-off-by: default avatarSiddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: default avatarRoger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20220628122255.24265-2-rogerq@kernel.org


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 568035b0

drivers/phy/ti/phy-j721e-wiz.c

+13 −6
Original line number Diff line number Diff line
@@ -325,7 +325,8 @@ static int wiz_p_mac_div_sel(struct wiz *wiz) 
	int i;



	for (i = 0; i < num_lanes; i++) {

		if (wiz->lane_phy_type[i] == PHY_TYPE_QSGMII) {

		if (wiz->lane_phy_type[i] == PHY_TYPE_SGMII ||

		    wiz->lane_phy_type[i] == PHY_TYPE_QSGMII) {

			ret = regmap_field_write(wiz->p_mac_div_sel0[i], 1);

			if (ret)

				return ret;
@@ -1025,12 +1026,18 @@ static int wiz_phy_reset_assert(struct reset_controller_dev *rcdev, 


static int wiz_phy_fullrt_div(struct wiz *wiz, int lane)

{

	if (wiz->type != AM64_WIZ_10G)

		return 0;



	switch (wiz->type) {

	case AM64_WIZ_10G:

		if (wiz->lane_phy_type[lane] == PHY_TYPE_PCIE)

			return regmap_field_write(wiz->p0_fullrt_div[lane], 0x1);



		break;

	case J721E_WIZ_10G:

		if (wiz->lane_phy_type[lane] == PHY_TYPE_SGMII)

			return regmap_field_write(wiz->p0_fullrt_div[lane], 0x2);

		break;

	default:

		return 0;

	}

	return 0;

}