Commit 29ee463d authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull hardware timestamp engine updates from Dipen Patel:
 "The changes for the hte subsystem include:

   - Add Tegra234 HTE provider and relevant DT bindings

   - Update MAINTAINERS file for the HTE subsystem"

* tag 'for-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/pateldipen1984/linux:
  hte: tegra-194: Use proper includes
  hte: Use device_match_of_node()
  hte: tegra-194: Fix off by one in tegra_hte_map_to_line_id()
  hte: tegra: fix 'struct of_device_id' build error
  hte: Use of_property_present() for testing DT property presence
  gpio: tegra186: Add Tegra234 hte support
  hte: handle nvidia,gpio-controller property
  hte: Deprecate nvidia,slices property
  hte: Add Tegra234 provider
  hte: Re-phrase tegra API document
  arm64: tegra: Add Tegra234 GTE nodes
  dt-bindings: timestamp: Deprecate nvidia,slices property
  dt-bindings: timestamp: Add Tegra234 support
  MAINTAINERS: Add HTE/timestamp subsystem details
parents 348551dd ca3d1a4b
Loading
Loading
Loading
Loading
+59 −7
Original line number Original line Diff line number Diff line
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/timestamp/nvidia,tegra194-hte.yaml#
$id: http://devicetree.org/schemas/timestamp/nvidia,tegra194-hte.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#


title: Tegra194 on chip generic hardware timestamping engine (HTE)
title: Tegra on chip generic hardware timestamping engine (HTE) provider


maintainers:
maintainers:
  - Dipen Patel <dipenp@nvidia.com>
  - Dipen Patel <dipenp@nvidia.com>
@@ -23,6 +23,8 @@ properties:
    enum:
    enum:
      - nvidia,tegra194-gte-aon
      - nvidia,tegra194-gte-aon
      - nvidia,tegra194-gte-lic
      - nvidia,tegra194-gte-lic
      - nvidia,tegra234-gte-aon
      - nvidia,tegra234-gte-lic


  reg:
  reg:
    maxItems: 1
    maxItems: 1
@@ -40,12 +42,20 @@ properties:


  nvidia,slices:
  nvidia,slices:
    $ref: /schemas/types.yaml#/definitions/uint32
    $ref: /schemas/types.yaml#/definitions/uint32
    deprecated: true
    description:
    description:
      HTE lines are arranged in 32 bit slice where each bit represents different
      HTE lines are arranged in 32 bit slice where each bit represents different
      line/signal that it can enable/configure for the timestamp. It is u32
      line/signal that it can enable/configure for the timestamp. It is u32
      property and depends on the HTE instance in the chip. The value 3 is for
      property and the value depends on the HTE instance in the chip. The AON
      GPIO GTE and 11 for IRQ GTE.
      GTE instances for both Tegra194 and Tegra234 has 3 slices. The Tegra194
    enum: [3, 11]
      LIC instance has 11 slices and Tegra234 LIC has 17 slices.
    enum: [3, 11, 17]

  nvidia,gpio-controller:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      The phandle to AON gpio controller instance. This is required to handle
      namespace conversion between GPIO and GTE.


  '#timestamp-cells':
  '#timestamp-cells':
    description:
    description:
@@ -59,9 +69,53 @@ required:
  - compatible
  - compatible
  - reg
  - reg
  - interrupts
  - interrupts
  - nvidia,slices
  - "#timestamp-cells"
  - "#timestamp-cells"


allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - nvidia,tegra194-gte-aon
              - nvidia,tegra234-gte-aon
    then:
      properties:
        nvidia,slices:
          const: 3

  - if:
      properties:
        compatible:
          contains:
            enum:
              - nvidia,tegra194-gte-lic
    then:
      properties:
        nvidia,slices:
          const: 11

  - if:
      properties:
        compatible:
          contains:
            enum:
              - nvidia,tegra234-gte-lic
    then:
      properties:
        nvidia,slices:
          const: 17

  - if:
      properties:
        compatible:
          contains:
            enum:
              - nvidia,tegra234-gte-aon
    then:
      required:
        - nvidia,gpio-controller

additionalProperties: false
additionalProperties: false


examples:
examples:
@@ -71,7 +125,6 @@ examples:
              reg = <0xc1e0000 0x10000>;
              reg = <0xc1e0000 0x10000>;
              interrupts = <0 13 0x4>;
              interrupts = <0 13 0x4>;
              nvidia,int-threshold = <1>;
              nvidia,int-threshold = <1>;
              nvidia,slices = <3>;
              #timestamp-cells = <1>;
              #timestamp-cells = <1>;
    };
    };


@@ -81,7 +134,6 @@ examples:
              reg = <0x3aa0000 0x10000>;
              reg = <0x3aa0000 0x10000>;
              interrupts = <0 11 0x4>;
              interrupts = <0 11 0x4>;
              nvidia,int-threshold = <1>;
              nvidia,int-threshold = <1>;
              nvidia,slices = <11>;
              #timestamp-cells = <1>;
              #timestamp-cells = <1>;
    };
    };


+1 −1
Original line number Original line Diff line number Diff line
@@ -18,5 +18,5 @@ HTE Tegra Provider
.. toctree::
.. toctree::
   :maxdepth: 1
   :maxdepth: 1


   tegra194-hte
   tegra-hte
+16 −17
Original line number Original line Diff line number Diff line
@@ -5,25 +5,25 @@ HTE Kernel provider driver


Description
Description
-----------
-----------
The Nvidia tegra194 HTE provider driver implements two GTE
The Nvidia tegra HTE provider also known as GTE (Generic Timestamping Engine)
(Generic Timestamping Engine) instances: 1) GPIO GTE and 2) LIC
driver implements two GTE instances: 1) GPIO GTE and 2) LIC
(Legacy Interrupt Controller) IRQ GTE. Both GTE instances get the
(Legacy Interrupt Controller) IRQ GTE. Both GTE instances get the timestamp
timestamp from the system counter TSC which has 31.25MHz clock rate, and the
from the system counter TSC which has 31.25MHz clock rate, and the driver
driver converts clock tick rate to nanoseconds before storing it as timestamp
converts clock tick rate to nanoseconds before storing it as timestamp value.
value.


GPIO GTE
GPIO GTE
--------
--------


This GTE instance timestamps GPIO in real time. For that to happen GPIO
This GTE instance timestamps GPIO in real time. For that to happen GPIO
needs to be configured as input. The always on (AON) GPIO controller instance
needs to be configured as input. Only the always on (AON) GPIO controller
supports timestamping GPIOs in real time and it has 39 GPIO lines. The GPIO GTE
instance supports timestamping GPIOs in real time as it is tightly coupled with
and AON GPIO controller are tightly coupled as it requires very specific bits
the GPIO GTE. To support this, GPIOLIB adds two optional APIs as mentioned
to be set in GPIO config register before GPIO GTE can be used, for that GPIOLIB
below. The GPIO GTE code supports both kernel and userspace consumers. The
adds two optional APIs as below. The GPIO GTE code supports both kernel
kernel space consumers can directly talk to HTE subsystem while userspace
and userspace consumers. The kernel space consumers can directly talk to HTE
consumers timestamp requests go through GPIOLIB CDEV framework to HTE
subsystem while userspace consumers timestamp requests go through GPIOLIB CDEV
subsystem. The hte devicetree binding described at
framework to HTE subsystem.
``Documentation/devicetree/bindings/timestamp`` provides an example of how a
consumer can request an GPIO line.


See gpiod_enable_hw_timestamp_ns() and gpiod_disable_hw_timestamp_ns().
See gpiod_enable_hw_timestamp_ns() and gpiod_disable_hw_timestamp_ns().


@@ -34,9 +34,8 @@ returns the timestamp in nanoseconds.
LIC (Legacy Interrupt Controller) IRQ GTE
LIC (Legacy Interrupt Controller) IRQ GTE
-----------------------------------------
-----------------------------------------


This GTE instance timestamps LIC IRQ lines in real time. There are 352 IRQ
This GTE instance timestamps LIC IRQ lines in real time. The hte devicetree
lines which this instance can add timestamps to in real time. The hte
binding described at ``Documentation/devicetree/bindings/timestamp``
devicetree binding described at ``Documentation/devicetree/bindings/timestamp``
provides an example of how a consumer can request an IRQ line. Since it is a
provides an example of how a consumer can request an IRQ line. Since it is a
one-to-one mapping with IRQ GTE provider, consumers can simply specify the IRQ
one-to-one mapping with IRQ GTE provider, consumers can simply specify the IRQ
number that they are interested in. There is no userspace consumer support for
number that they are interested in. There is no userspace consumer support for
+3 −0
Original line number Original line Diff line number Diff line
@@ -9489,6 +9489,9 @@ F: drivers/input/touchscreen/htcpen.c
HTE SUBSYSTEM
HTE SUBSYSTEM
M:	Dipen Patel <dipenp@nvidia.com>
M:	Dipen Patel <dipenp@nvidia.com>
L:	timestamp@lists.linux.dev
T:	git git://git.kernel.org/pub/scm/linux/kernel/git/pateldipen1984/linux.git
Q:	https://patchwork.kernel.org/project/timestamp/list/
S:	Maintained
S:	Maintained
F:	Documentation/devicetree/bindings/timestamp/
F:	Documentation/devicetree/bindings/timestamp/
F:	Documentation/driver-api/hte/
F:	Documentation/driver-api/hte/
+17 −0
Original line number Original line Diff line number Diff line
@@ -1154,6 +1154,14 @@ fuse@3810000 {
			clock-names = "fuse";
			clock-names = "fuse";
		};
		};


		hte_lic: hardware-timestamp@3aa0000 {
			compatible = "nvidia,tegra234-gte-lic";
			reg = <0x0 0x3aa0000 0x0 0x10000>;
			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
			nvidia,int-threshold = <1>;
			#timestamp-cells = <1>;
		};

		hsp_top0: hsp@3c00000 {
		hsp_top0: hsp@3c00000 {
			compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
			compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
			reg = <0x0 0x03c00000 0x0 0xa0000>;
			reg = <0x0 0x03c00000 0x0 0xa0000>;
@@ -1671,6 +1679,15 @@ hsp_aon: hsp@c150000 {
			#mbox-cells = <2>;
			#mbox-cells = <2>;
		};
		};


		hte_aon: hardware-timestamp@c1e0000 {
			compatible = "nvidia,tegra234-gte-aon";
			reg = <0x0 0xc1e0000 0x0 0x10000>;
			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
			nvidia,int-threshold = <1>;
			nvidia,gpio-controller = <&gpio_aon>;
			#timestamp-cells = <1>;
		};

		gen2_i2c: i2c@c240000 {
		gen2_i2c: i2c@c240000 {
			compatible = "nvidia,tegra194-i2c";
			compatible = "nvidia,tegra194-i2c";
			reg = <0x0 0xc240000 0x0 0x100>;
			reg = <0x0 0xc240000 0x0 0x100>;
Loading