Commit 2a11b3bf authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Bjorn Andersson
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arm64: dts: qcom: sdm630: Drop flags for mdss irqs 



The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: default avatarStephen Boyd <swboyd@chromium.org>
Fixes: b52555d5 ("arm64: dts: qcom: sdm630: Add MDSS nodes")
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarMarijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-2-dmitry.baryshkov@linaro.org
parent 7b36ab26

arch/arm64/boot/dts/qcom/sdm630.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -1453,7 +1453,7 @@ mdp: mdp@c901000 { 
				reg-names = "mdp_phys";



				interrupt-parent = <&mdss>;

				interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;

				interrupts = <0>;



				assigned-clocks = <&mmcc MDSS_MDP_CLK>,

						  <&mmcc MDSS_VSYNC_CLK>;
@@ -1530,7 +1530,7 @@ dsi0: dsi@c994000 { 
				power-domains = <&rpmpd SDM660_VDDCX>;



				interrupt-parent = <&mdss>;

				interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;

				interrupts = <4>;



				assigned-clocks = <&mmcc BYTE0_CLK_SRC>,

						  <&mmcc PCLK0_CLK_SRC>;