Commit 2a762130 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab
Browse files

ia64, scsi: update references for the device-io book 



The book is now at Documentation/driver-api/device-io.rst.
Update such references.

Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@s-opensource.com>
parent 19285f3c

arch/ia64/include/asm/io.h

+1 −1
Original line number Diff line number Diff line
@@ -117,7 +117,7 @@ extern int valid_mmap_phys_addr_range (unsigned long pfn, size_t count); 
 * following the barrier will arrive after all previous writes.  For most

 * ia64 platforms, this is a simple 'mf.a' instruction.

 *

 * See Documentation/DocBook/deviceiobook.tmpl for more information.

 * See Documentation/driver-api/device-io.rst for more information.

 */

static inline void ___ia64_mmiowb(void)

{

arch/ia64/sn/kernel/iomv.c

+1 −1
Original line number Diff line number Diff line
@@ -63,7 +63,7 @@ EXPORT_SYMBOL(sn_io_addr); 
/**

 * __sn_mmiowb - I/O space memory barrier

 *

 * See arch/ia64/include/asm/io.h and Documentation/DocBook/deviceiobook.tmpl

 * See arch/ia64/include/asm/io.h and Documentation/driver-api/device-io.rst

 * for details.

 *

 * On SN2, we wait for the PIO_WRITE_STATUS SHub register to clear.

drivers/scsi/qla1280.c

+1 −1
Original line number Diff line number Diff line
@@ -3390,7 +3390,7 @@ qla1280_isp_cmd(struct scsi_qla_host *ha) 
	 *    On PCI bus, order reverses and write of 6 posts, then index 5,

	 *       causing chip to issue full queue of stale commands

	 * The mmiowb() prevents future writes from crossing the barrier.

	 * See Documentation/DocBook/deviceiobook.tmpl for more information.

	 * See Documentation/driver-api/device-io.rst for more information.

	 */

	WRT_REG_WORD(&reg->mailbox4, ha->req_ring_index);

	mmiowb();