Commit 2ad127ba authored by Nicholas Susanto's avatar Nicholas Susanto Committed by Alex Deucher
Browse files

drm/amd/display: Cache backlight_millinits in link structure and setting brightness accordingly 



[Why]
Need to save the cached backlight level so that display lights up using
appropriate brightness level instead of the default brightness when
waking up from s0i3.

[How]
Adding a backlight level cache in link structure. Also instead on
calling set_default_brightness_aux, check if cached values exists.

Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: default avatarWenjing Liu <wenjing.liu@amd.com>
Acked-by: default avatarAlan Liu <haoping.liu@amd.com>
Signed-off-by: default avatarNicholas Susanto <nicholas.susanto@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6d435a2e

drivers/gpu/drm/amd/display/dc/dc.h

+1 −0
Original line number Diff line number Diff line
@@ -1515,6 +1515,7 @@ struct dc_link { 
	enum edp_revision edp_revision;

	union dpcd_sink_ext_caps dpcd_sink_ext_caps;



	struct backlight_settings backlight_settings;

	struct psr_settings psr_settings;



	/* Drive settings read from integrated info table */

drivers/gpu/drm/amd/display/dc/dc_types.h

+4 −0
Original line number Diff line number Diff line
@@ -994,6 +994,10 @@ struct link_mst_stream_allocation_table { 
	struct link_mst_stream_allocation stream_allocations[MAX_CONTROLLER_NUM];

};



struct backlight_settings {

	uint32_t backlight_millinits;

};



/* PSR feature flags */

struct psr_settings {

	bool psr_feature_enabled;		// PSR is supported by sink

drivers/gpu/drm/amd/display/dc/link/link_detection.c

+1 −2
Original line number Diff line number Diff line
@@ -876,8 +876,7 @@ static bool detect_link_and_local_sink(struct dc_link *link, 
			(link->dpcd_sink_ext_caps.bits.oled == 1)) {

			dpcd_set_source_specific_data(link);

			msleep(post_oui_delay);

			set_default_brightness_aux(link);

			//TODO: use cached

			set_cached_brightness_aux(link);

		}



		return true;

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

+2 −1
Original line number Diff line number Diff line
@@ -2136,7 +2136,8 @@ static enum dc_status enable_link_dp(struct dc_state *state, 
	if (link->dpcd_sink_ext_caps.bits.oled == 1 ||

		link->dpcd_sink_ext_caps.bits.sdr_aux_backlight_control == 1 ||

		link->dpcd_sink_ext_caps.bits.hdr_aux_backlight_control == 1) {

		set_default_brightness_aux(link); // TODO: use cached if known

		set_cached_brightness_aux(link);



		if (link->dpcd_sink_ext_caps.bits.oled == 1)

			msleep(bl_oled_enable_delay);

		edp_backlight_enable_aux(link, true);

drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c

+11 −0
Original line number Diff line number Diff line
@@ -164,6 +164,7 @@ bool edp_set_backlight_level_nits(struct dc_link *link, 
	*(uint32_t *)&dpcd_backlight_set.backlight_level_millinits = backlight_millinits;

	*(uint16_t *)&dpcd_backlight_set.backlight_transition_time_ms = (uint16_t)transition_time_in_ms;



	link->backlight_settings.backlight_millinits = backlight_millinits;



	if (!link->dpcd_caps.panel_luminance_control) {

		if (core_link_write_dpcd(link, DP_SOURCE_BACKLIGHT_LEVEL,
@@ -276,6 +277,16 @@ bool set_default_brightness_aux(struct dc_link *link) 
	return false;

}



bool set_cached_brightness_aux(struct dc_link *link)

{

	if (link->backlight_settings.backlight_millinits)

		return edp_set_backlight_level_nits(link, true,

						    link->backlight_settings.backlight_millinits, 0);

	else

		return set_default_brightness_aux(link);

	return false;

}



bool edp_is_ilr_optimization_required(struct dc_link *link,

		struct dc_crtc_timing *crtc_timing)

{