Commit 2c0a1faa authored by Tudor Ambarus's avatar Tudor Ambarus Committed by Nicolas Ferre
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ARM: dts: at91: sam9x60ek: Set sst26vf064b SPI NOR flash at its maximum frequency



sam9x60ek populates an sst26vf064b SPI NOR flash. Its maximum operating
frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V,
increase its maximum supported frequency to 104MHz. The increasing of the
spi-max-frequency value requires the setting of the
"CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7.

The sst26vf064b datasheet specifies just a minimum value for the
"CE# Not Active Hold Time" and it advertises it to 5 ns. There's no
maximum time specified. I determined experimentally that 5 ns for the
spi-cs-setup-ns is not enough when the flash is operated close to its
maximum frequency and tests showed that 7 ns is just fine, so set the
spi-cs-setup-ns dt property to 7.

With the increase of frequency the reads are now faster with ~33%.

Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20230328101517.1595738-5-tudor.ambarus@linaro.org


Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
parent 46a8a137
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Original line number Diff line number Diff line
@@ -578,7 +578,8 @@ flash@0 {
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <80000000>;
		spi-max-frequency = <104000000>;
		spi-cs-setup-ns = <7>;
		spi-tx-bus-width = <4>;
		spi-rx-bus-width = <4>;
		m25p,fast-read;