Commit 2fcd14d0 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files


net/mptcp/protocol.c
  977d293e ("mptcp: ensure tx skbs always have the MPTCP ext")
  efe686ff ("mptcp: ensure tx skbs always have the MPTCP ext")

same patch merged in both trees, keep net-next.

Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 9aad3e4e 9bc62afe
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@@ -54,7 +54,7 @@ properties:
          - const: toradex,apalis_t30
          - const: nvidia,tegra30
      - items:
          - const: toradex,apalis_t30-eval-v1.1
          - const: toradex,apalis_t30-v1.1-eval
          - const: toradex,apalis_t30-eval
          - const: toradex,apalis_t30-v1.1
          - const: toradex,apalis_t30
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@@ -9,7 +9,7 @@ function block.

All DISP device tree nodes must be siblings to the central MMSYS_CONFIG node.
For a description of the MMSYS_CONFIG binding, see
Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt.
Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml.

DISP function blocks
====================
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/ufs/samsung,exynos-ufs.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung SoC series UFS host controller Device Tree Bindings

maintainers:
  - Alim Akhtar <alim.akhtar@samsung.com>

description: |
  Each Samsung UFS host controller instance should have its own node.
  This binding define Samsung specific binding other then what is used
  in the common ufshcd bindings
  [1] Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt

properties:

  compatible:
    enum:
      - samsung,exynos7-ufs

  reg:
    items:
      - description: HCI register
      - description: vendor specific register
      - description: unipro register
      - description: UFS protector register

  reg-names:
    items:
      - const: hci
      - const: vs_hci
      - const: unipro
      - const: ufsp

  clocks:
    items:
      - description: ufs link core clock
      - description: unipro main clock

  clock-names:
    items:
      - const: core_clk
      - const: sclk_unipro_main

  interrupts:
    maxItems: 1

  phys:
    maxItems: 1

  phy-names:
    const: ufs-phy

required:
  - compatible
  - reg
  - interrupts
  - phys
  - phy-names
  - clocks
  - clock-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/exynos7-clk.h>

    ufs: ufs@15570000 {
       compatible = "samsung,exynos7-ufs";
       reg = <0x15570000 0x100>,
             <0x15570100 0x100>,
             <0x15571000 0x200>,
             <0x15572000 0x300>;
       reg-names = "hci", "vs_hci", "unipro", "ufsp";
       interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
       clocks = <&clock_fsys1 ACLK_UFS20_LINK>,
                <&clock_fsys1 SCLK_UFSUNIPRO20_USER>;
       clock-names = "core_clk", "sclk_unipro_main";
       pinctrl-names = "default";
       pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
       phys = <&ufs_phy>;
       phy-names = "ufs-phy";
    };
...
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@@ -851,7 +851,7 @@ NOTES:
- 0x88A8 traffic will not be received unless VLAN stripping is disabled with
  the following command::

    # ethool -K <ethX> rxvlan off
    # ethtool -K <ethX> rxvlan off

- 0x88A8/0x8100 double VLANs cannot be used with 0x8100 or 0x8100/0x8100 VLANS
  configured on the same port. 0x88a8/0x8100 traffic will not be received if
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@@ -296,7 +296,7 @@ not available.
Device Tree bindings and board design
=====================================

This section references ``Documentation/devicetree/bindings/net/dsa/sja1105.txt``
This section references ``Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml``
and aims to showcase some potential switch caveats.

RMII PHY role and out-of-band signaling
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