Commit 302c9454 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branch 'uniphier/dt' into arm/dt 

Updates from Kunihiko Hayashi via email:

 "Update devicetree sources for UniPhier armv8 SoCs to remove dtschema
  warnings, add support existing features that haven't yet been
  described, and replace constants with macros."

* uniphier/dt:
  arm64: dts: uniphier: Add L2 cache node
  arm64: dts: uniphier: Remove compatible "snps,dw-pcie" from pcie node
  arm64: dts: uniphier: Fix opp-table node name for LD20
  arm64: dts: uniphier: Add USB-device support for PXs3 reference board
  arm64: dts: uniphier: Add ahci controller nodes for PXs3
  arm64: dts: uniphier: Use GIC interrupt definitions
  arm64: dts: uniphier: Rename gpio-hog nodes
  arm64: dts: uniphier: Rename usb-glue node for USB3 to usb-controller
  arm64: dts: uniphier: Rename usb-phy node for USB2 to usb-controller
  arm64: dts: uniphier: Rename pvtctl node to thermal-sensor
  ARM: dts: uniphier: Remove compatible "snps,dw-pcie-ep" from pcie-ep node
  ARM: dts: uniphier: Move interrupt-parent property to each child node in uniphier-support-card
  ARM: dts: uniphier: Add ahci controller nodes for PXs2
  ARM: dts: uniphier: Add ahci controller nodes for Pro4
  ARM: dts: uniphier: Use GIC interrupt definitions
  ARM: dts: uniphier: Rename gpio-hog node
  ARM: dts: uniphier: Rename usb-glue node for USB3 to usb-controller
  ARM: dts: uniphier: Rename usb-phy node for USB2 to usb-controller
  ARM: dts: uniphier: Rename pvtctl node to thermal-sensor
parents 3ba2d4bb 5381a96c

arch/arm/boot/dts/uniphier-ld4-ref.dts

+3 −3
Original line number Diff line number Diff line
@@ -36,11 +36,11 @@ memory@80000000 { 
};



&ethsc {

	interrupts = <1 8>;

	interrupts = <1 IRQ_TYPE_LEVEL_LOW>;

};



&serialsc {

	interrupts = <1 8>;

	interrupts = <1 IRQ_TYPE_LEVEL_LOW>;

};



&serial0 {
@@ -56,7 +56,7 @@ &serial3 { 
};



&gpio {

	xirq1 {

	xirq1-hog {

		gpio-hog;

		gpios = <UNIPHIER_GPIO_IRQ(1) 0>;

		input;

arch/arm/boot/dts/uniphier-ld4.dtsi

+29 −20
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
//   Author: Masahiro Yamada <yamada.masahiro@socionext.com>



#include <dt-bindings/gpio/uniphier-gpio.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>



/ {

	compatible = "socionext,uniphier-ld4";
@@ -55,7 +56,8 @@ l2: cache-controller@500c0000 { 
			compatible = "socionext,uniphier-system-cache";

			reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,

			      <0x506c0000 0x400>;

			interrupts = <0 174 4>, <0 175 4>;

			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;

			cache-unified;

			cache-size = <(512 * 1024)>;

			cache-sets = <256>;
@@ -69,7 +71,7 @@ spi: spi@54006000 { 
			reg = <0x54006000 0x100>;

			#address-cells = <1>;

			#size-cells = <0>;

			interrupts = <0 39 4>;

			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_spi0>;

			clocks = <&peri_clk 11>;
@@ -80,7 +82,7 @@ serial0: serial@54006800 { 
			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006800 0x40>;

			interrupts = <0 33 4>;

			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart0>;

			clocks = <&peri_clk 0>;
@@ -91,7 +93,7 @@ serial1: serial@54006900 { 
			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006900 0x40>;

			interrupts = <0 35 4>;

			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart1>;

			clocks = <&peri_clk 1>;
@@ -102,7 +104,7 @@ serial2: serial@54006a00 { 
			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006a00 0x40>;

			interrupts = <0 37 4>;

			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart2>;

			clocks = <&peri_clk 2>;
@@ -113,7 +115,7 @@ serial3: serial@54006b00 { 
			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006b00 0x40>;

			interrupts = <0 29 4>;

			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart3>;

			clocks = <&peri_clk 3>;
@@ -140,7 +142,7 @@ i2c0: i2c@58400000 { 
			reg = <0x58400000 0x40>;

			#address-cells = <1>;

			#size-cells = <0>;

			interrupts = <0 41 1>;

			interrupts = <GIC_SPI 41 IRQ_TYPE_EDGE_RISING>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_i2c0>;

			clocks = <&peri_clk 4>;
@@ -154,7 +156,7 @@ i2c1: i2c@58480000 { 
			reg = <0x58480000 0x40>;

			#address-cells = <1>;

			#size-cells = <0>;

			interrupts = <0 42 1>;

			interrupts = <GIC_SPI 42 IRQ_TYPE_EDGE_RISING>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_i2c1>;

			clocks = <&peri_clk 5>;
@@ -168,7 +170,7 @@ i2c2: i2c@58500000 { 
			reg = <0x58500000 0x40>;

			#address-cells = <1>;

			#size-cells = <0>;

			interrupts = <0 43 1>;

			interrupts = <GIC_SPI 43 IRQ_TYPE_EDGE_RISING>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_i2c2>;

			clocks = <&peri_clk 6>;
@@ -182,7 +184,7 @@ i2c3: i2c@58580000 { 
			reg = <0x58580000 0x40>;

			#address-cells = <1>;

			#size-cells = <0>;

			interrupts = <0 44 1>;

			interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_i2c3>;

			clocks = <&peri_clk 7>;
@@ -240,8 +242,13 @@ peri_rst: reset { 
		dmac: dma-controller@5a000000 {

			compatible = "socionext,uniphier-mio-dmac";

			reg = <0x5a000000 0x1000>;

			interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>,

				     <0 71 4>, <0 72 4>, <0 73 4>;

			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&mio_clk 7>;

			resets = <&mio_rst 7>;

			#dma-cells = <1>;
@@ -251,7 +258,7 @@ sd: mmc@5a400000 { 
			compatible = "socionext,uniphier-sd-v2.91";

			status = "disabled";

			reg = <0x5a400000 0x200>;

			interrupts = <0 76 4>;

			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;

			pinctrl-names = "default", "uhs";

			pinctrl-0 = <&pinctrl_sd>;

			pinctrl-1 = <&pinctrl_sd_uhs>;
@@ -271,7 +278,7 @@ emmc: mmc@5a500000 { 
			compatible = "socionext,uniphier-sd-v2.91";

			status = "disabled";

			reg = <0x5a500000 0x200>;

			interrupts = <0 78 4>;

			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_emmc>;

			clocks = <&mio_clk 1>;
@@ -289,7 +296,7 @@ usb0: usb@5a800100 { 
			compatible = "socionext,uniphier-ehci", "generic-ehci";

			status = "disabled";

			reg = <0x5a800100 0x100>;

			interrupts = <0 80 4>;

			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_usb0>;

			clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>,
@@ -303,7 +310,7 @@ usb1: usb@5a810100 { 
			compatible = "socionext,uniphier-ehci", "generic-ehci";

			status = "disabled";

			reg = <0x5a810100 0x100>;

			interrupts = <0 81 4>;

			interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_usb1>;

			clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>,
@@ -317,7 +324,7 @@ usb2: usb@5a820100 { 
			compatible = "socionext,uniphier-ehci", "generic-ehci";

			status = "disabled";

			reg = <0x5a820100 0x100>;

			interrupts = <0 82 4>;

			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_usb2>;

			clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>,
@@ -358,14 +365,16 @@ efuse@130 { 
		timer@60000200 {

			compatible = "arm,cortex-a9-global-timer";

			reg = <0x60000200 0x20>;

			interrupts = <1 11 0x104>;

			interrupts = <GIC_PPI 11

				(GIC_CPU_MASK_RAW(1) | IRQ_TYPE_LEVEL_HIGH)>;

			clocks = <&arm_timer_clk>;

		};



		timer@60000600 {

			compatible = "arm,cortex-a9-twd-timer";

			reg = <0x60000600 0x20>;

			interrupts = <1 13 0x104>;

			interrupts = <GIC_PPI 13

				(GIC_CPU_MASK_RAW(1) | IRQ_TYPE_LEVEL_HIGH)>;

			clocks = <&arm_timer_clk>;

		};
@@ -407,7 +416,7 @@ nand: nand-controller@68000000 { 
			reg = <0x68000000 0x20>, <0x68100000 0x1000>;

			#address-cells = <1>;

			#size-cells = <0>;

			interrupts = <0 65 4>;

			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_nand>;

			clock-names = "nand", "nand_x", "ecc";

arch/arm/boot/dts/uniphier-ld6b-ref.dts

+3 −3
Original line number Diff line number Diff line
@@ -40,11 +40,11 @@ memory@80000000 { 
};



&ethsc {

	interrupts = <4 8>;

	interrupts = <4 IRQ_TYPE_LEVEL_LOW>;

};



&serialsc {

	interrupts = <4 8>;

	interrupts = <4 IRQ_TYPE_LEVEL_LOW>;

};



&serial0 {
@@ -60,7 +60,7 @@ &serial2 { 
};



&gpio {

	xirq4 {

	xirq4-hog {

		gpio-hog;

		gpios = <UNIPHIER_GPIO_IRQ(4) 0>;

		input;

arch/arm/boot/dts/uniphier-pinctrl.dtsi

+10 −0
Original line number Diff line number Diff line
@@ -196,11 +196,21 @@ pinctrl_usb0: usb0 { 
		function = "usb0";

	};



	pinctrl_usb0_device: usb0-device {

		groups = "usb0_device";

		function = "usb0";

	};



	pinctrl_usb1: usb1 {

		groups = "usb1";

		function = "usb1";

	};



	pinctrl_usb1_device: usb1-device {

		groups = "usb1_device";

		function = "usb1";

	};



	pinctrl_usb2: usb2 {

		groups = "usb2";

		function = "usb2";

arch/arm/boot/dts/uniphier-pro4-ace.dts

+8 −0
Original line number Diff line number Diff line
@@ -99,3 +99,11 @@ &usb0 { 
&usb1 {

	status = "okay";

};



&ahci0 {

	status = "okay";

};



&ahci1 {

	status = "okay";

};