Loading drivers/watchdog/i6300esb.c +5 −16 Original line number Diff line number Diff line Loading @@ -68,6 +68,7 @@ #define ESB_WDT_INTTYPE (0x11 << 0) /* Interrupt type on timer1 timeout */ /* Reload register bits */ #define ESB_WDT_TIMEOUT (0x01 << 9) /* Watchdog timed out */ #define ESB_WDT_RELOAD (0x01 << 8) /* prevent timeout */ /* Magic constants */ Loading @@ -87,7 +88,6 @@ static struct platform_device *esb_platform_device; /* 30 sec default heartbeat (1 < heartbeat < 2*1023) */ #define WATCHDOG_HEARTBEAT 30 static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */ module_param(heartbeat, int, 0); MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (1<heartbeat<2046, default=" Loading Loading @@ -190,18 +190,6 @@ static int esb_timer_set_heartbeat(int time) return 0; } static int esb_timer_read(void) { u32 count; /* This isn't documented, and doesn't take into * acount which stage is running, but it looks * like a 20 bit count down, so we might as well report it. */ pci_read_config_dword(esb_pci, 0x64, &count); return (int)count; } /* * /dev/watchdog handling */ Loading Loading @@ -282,7 +270,7 @@ static long esb_ioctl(struct file *file, unsigned int cmd, unsigned long arg) sizeof(ident)) ? -EFAULT : 0; case WDIOC_GETSTATUS: return put_user(esb_timer_read(), p); return put_user(0, p); case WDIOC_GETBOOTSTATUS: return put_user(triggered, p); Loading Loading @@ -412,11 +400,12 @@ static unsigned char __devinit esb_getdevice(void) /* Check if the watchdog was previously triggered */ esb_unlock_registers(); val2 = readw(ESB_RELOAD_REG); triggered = (val2 & (0x01 << 9) >> 9); if (val2 & ESB_WDT_TIMEOUT) triggered = WDIOF_CARDRESET; /* Reset trigger flag and timers */ esb_unlock_registers(); writew((0x11 << 8), ESB_RELOAD_REG); writew((ESB_WDT_TIMEOUT | ESB_WDT_RELOAD), ESB_RELOAD_REG); /* Done */ return 1; Loading Loading
drivers/watchdog/i6300esb.c +5 −16 Original line number Diff line number Diff line Loading @@ -68,6 +68,7 @@ #define ESB_WDT_INTTYPE (0x11 << 0) /* Interrupt type on timer1 timeout */ /* Reload register bits */ #define ESB_WDT_TIMEOUT (0x01 << 9) /* Watchdog timed out */ #define ESB_WDT_RELOAD (0x01 << 8) /* prevent timeout */ /* Magic constants */ Loading @@ -87,7 +88,6 @@ static struct platform_device *esb_platform_device; /* 30 sec default heartbeat (1 < heartbeat < 2*1023) */ #define WATCHDOG_HEARTBEAT 30 static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */ module_param(heartbeat, int, 0); MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (1<heartbeat<2046, default=" Loading Loading @@ -190,18 +190,6 @@ static int esb_timer_set_heartbeat(int time) return 0; } static int esb_timer_read(void) { u32 count; /* This isn't documented, and doesn't take into * acount which stage is running, but it looks * like a 20 bit count down, so we might as well report it. */ pci_read_config_dword(esb_pci, 0x64, &count); return (int)count; } /* * /dev/watchdog handling */ Loading Loading @@ -282,7 +270,7 @@ static long esb_ioctl(struct file *file, unsigned int cmd, unsigned long arg) sizeof(ident)) ? -EFAULT : 0; case WDIOC_GETSTATUS: return put_user(esb_timer_read(), p); return put_user(0, p); case WDIOC_GETBOOTSTATUS: return put_user(triggered, p); Loading Loading @@ -412,11 +400,12 @@ static unsigned char __devinit esb_getdevice(void) /* Check if the watchdog was previously triggered */ esb_unlock_registers(); val2 = readw(ESB_RELOAD_REG); triggered = (val2 & (0x01 << 9) >> 9); if (val2 & ESB_WDT_TIMEOUT) triggered = WDIOF_CARDRESET; /* Reset trigger flag and timers */ esb_unlock_registers(); writew((0x11 << 8), ESB_RELOAD_REG); writew((ESB_WDT_TIMEOUT | ESB_WDT_RELOAD), ESB_RELOAD_REG); /* Done */ return 1; Loading