Commit 3604ef61 authored by Thippeswamy Havalige's avatar Thippeswamy Havalige Committed by Michal Simek
Browse files

microblaze/PCI: Remove unused sys_pciconfig_iobase() and et al declaration 



Removed unused code which provides information of various
I/O regions.

Signed-off-by: default avatarThippeswamy Havalige <thippeswamy.havalige@amd.com>
Link: https://lore.kernel.org/r/20221025065214.4663-11-thippeswamy.havalige@amd.com


Signed-off-by: default avatarMichal Simek <michal.simek@amd.com>
parent 68c9858b

arch/microblaze/include/asm/pci-bridge.h

+0 −8
Original line number Diff line number Diff line
@@ -29,17 +29,9 @@ struct pci_controller { 
	struct list_head list_node;

	struct device *parent;



	int first_busno;

	int last_busno;



	void __iomem *io_base_virt;

	resource_size_t io_base_phys;



	/* Some machines (PReP) have a non 1:1 mapping of

	 * the PCI memory space in the CPU bus space

	 */

	resource_size_t pci_mem_offset;



	/* Currently, we limit ourselves to 1 IO range and 3 mem

	 * ranges since the common pci_bus structure can't handle more

	 */

arch/microblaze/include/asm/pci.h

+0 −7
Original line number Diff line number Diff line
@@ -21,13 +21,6 @@ 
#define PCIBIOS_MIN_IO		0x1000

#define PCIBIOS_MIN_MEM		0x10000000



/* Values for the `which' argument to sys_pciconfig_iobase syscall.  */

#define IOBASE_BRIDGE_NUMBER	0

#define IOBASE_MEMORY		1

#define IOBASE_IO		2

#define IOBASE_ISA_IO		3

#define IOBASE_ISA_MEM		4



/*

 * Set this to 1 if you want the kernel to re-assign all PCI

 * bus numbers (don't do that on ppc64 yet !)

arch/microblaze/pci/pci-common.c

+0 −44
Original line number Diff line number Diff line
@@ -38,9 +38,6 @@ 
static DEFINE_SPINLOCK(hose_spinlock);

LIST_HEAD(hose_list);



/* ISA Memory physical address */

resource_size_t isa_mem_base;



unsigned long isa_io_base;

EXPORT_SYMBOL(isa_io_base);
@@ -92,44 +89,3 @@ int pci_proc_domain(struct pci_bus *bus) 
{

	return pci_domain_nr(bus);

}
 


static struct pci_controller *pci_bus_to_hose(int bus)

{

	struct pci_controller *hose, *tmp;



	list_for_each_entry_safe(hose, tmp, &hose_list, list_node)

		if (bus >= hose->first_busno && bus <= hose->last_busno)

			return hose;

	return NULL;

}



/* Provide information on locations of various I/O regions in physical

 * memory.  Do this on a per-card basis so that we choose the right

 * root bridge.

 * Note that the returned IO or memory base is a physical address

 */



long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)

{

	struct pci_controller *hose;

	long result = -EOPNOTSUPP;



	hose = pci_bus_to_hose(bus);

	if (!hose)

		return -ENODEV;



	switch (which) {

	case IOBASE_BRIDGE_NUMBER:

		return (long)hose->first_busno;

	case IOBASE_MEMORY:

		return (long)hose->pci_mem_offset;

	case IOBASE_IO:

		return (long)hose->io_base_phys;

	case IOBASE_ISA_IO:

		return (long)isa_io_base;

	case IOBASE_ISA_MEM:

		return (long)isa_mem_base;

	}



	return result;

}