Commit 36e2ad1d authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm/dpu: inline WB_BLK macros 



To simplify making changes to the hardware block definitions, expand
corresponding macros. This way making all the changes are more obvious
and visible in the source files.

Tested-by: default avatarMarijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: default avatarMarijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/545380/
Link: https://lore.kernel.org/r/20230704022136.130522-17-dmitry.baryshkov@linaro.org
parent 35973be8

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h

+12 −2
Original line number Diff line number Diff line
@@ -323,8 +323,18 @@ static const struct dpu_intf_cfg sm8250_intf[] = { 
};



static const struct dpu_wb_cfg sm8250_wb[] = {

	WB_BLK("wb_2", WB_2, 0x65000, WB_SM8250_MASK, DPU_CLK_CTRL_WB2, 6,

			VBIF_RT, MDP_SSPP_TOP0_INTR, 4096, 4),

	{

		.name = "wb_2", .id = WB_2,

		.base = 0x65000, .len = 0x2c8,

		.features = WB_SM8250_MASK,

		.format_list = wb2_formats,

		.num_formats = ARRAY_SIZE(wb2_formats),

		.clk_ctrl = DPU_CLK_CTRL_WB2,

		.xin_id = 6,

		.vbif_idx = VBIF_RT,

		.maxlinewidth = 4096,

		.intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4),

	},

};



static const struct dpu_perf_cfg sm8250_perf_data = {

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h

+12 −2
Original line number Diff line number Diff line
@@ -148,8 +148,18 @@ static const struct dpu_intf_cfg sc7180_intf[] = { 
};



static const struct dpu_wb_cfg sc7180_wb[] = {

	WB_BLK("wb_2", WB_2, 0x65000, WB_SM8250_MASK, DPU_CLK_CTRL_WB2, 6,

			VBIF_RT, MDP_SSPP_TOP0_INTR, 4096, 4),

	{

		.name = "wb_2", .id = WB_2,

		.base = 0x65000, .len = 0x2c8,

		.features = WB_SM8250_MASK,

		.format_list = wb2_formats,

		.num_formats = ARRAY_SIZE(wb2_formats),

		.clk_ctrl = DPU_CLK_CTRL_WB2,

		.xin_id = 6,

		.vbif_idx = VBIF_RT,

		.maxlinewidth = 4096,

		.intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4),

	},

};



static const struct dpu_perf_cfg sc7180_perf_data = {

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h

+12 −2
Original line number Diff line number Diff line
@@ -176,8 +176,18 @@ static const struct dpu_dsc_cfg sc7280_dsc[] = { 
};



static const struct dpu_wb_cfg sc7280_wb[] = {

	WB_BLK("wb_2", WB_2, 0x65000, WB_SM8250_MASK, DPU_CLK_CTRL_WB2, 6,

			VBIF_RT, MDP_SSPP_TOP0_INTR, 4096, 4),

	{

		.name = "wb_2", .id = WB_2,

		.base = 0x65000, .len = 0x2c8,

		.features = WB_SM8250_MASK,

		.format_list = wb2_formats,

		.num_formats = ARRAY_SIZE(wb2_formats),

		.clk_ctrl = DPU_CLK_CTRL_WB2,

		.xin_id = 6,

		.vbif_idx = VBIF_RT,

		.maxlinewidth = 4096,

		.intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4),

	},

};



static const struct dpu_intf_cfg sc7280_intf[] = {

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

+0 −18
Original line number Diff line number Diff line
@@ -493,24 +493,6 @@ static const struct dpu_dsc_sub_blks dsc_sblk_1 = { 
	.intr_tear_rd_ptr = _tear_rd_ptr, \

	}



/*************************************************************

 * Writeback blocks config

 *************************************************************/

#define WB_BLK(_name, _id, _base, _features, _clk_ctrl, \

		__xin_id, vbif_id, _reg, _max_linewidth, _wb_done_bit) \

	{ \

	.name = _name, .id = _id, \

	.base = _base, .len = 0x2c8, \

	.features = _features, \

	.format_list = wb2_formats, \

	.num_formats = ARRAY_SIZE(wb2_formats), \

	.clk_ctrl = _clk_ctrl, \

	.xin_id = __xin_id, \

	.vbif_idx = vbif_id, \

	.maxlinewidth = _max_linewidth, \

	.intr_wb_done = DPU_IRQ_IDX(_reg, _wb_done_bit) \

	}



/*************************************************************

 * VBIF sub blocks config

 *************************************************************/