Commit 376a5c3c authored by Kai Ye's avatar Kai Ye Committed by Herbert Xu
Browse files

crypto: hisilicon - modify the value of engine type rate 



Modify the value of type rate from new QM spec.

Signed-off-by: default avatarKai Ye <yekai13@huawei.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent d3b04a43

drivers/crypto/hisilicon/hpre/hpre_main.c

+1 −1
Original line number Diff line number Diff line
@@ -103,7 +103,7 @@ 
#define HPRE_QM_PM_FLR			BIT(11)

#define HPRE_QM_SRIOV_FLR		BIT(12)



#define HPRE_SHAPER_TYPE_RATE		128

#define HPRE_SHAPER_TYPE_RATE		640

#define HPRE_VIA_MSI_DSM		1

#define HPRE_SQE_MASK_OFFSET		8

#define HPRE_SQE_MASK_LEN		24

drivers/crypto/hisilicon/sec2/sec_main.c

+1 −1
Original line number Diff line number Diff line
@@ -105,7 +105,7 @@ 


#define SEC_SQE_MASK_OFFSET		64

#define SEC_SQE_MASK_LEN		48

#define SEC_SHAPER_TYPE_RATE		128

#define SEC_SHAPER_TYPE_RATE		400



struct sec_hw_error {

	u32 int_msk;

drivers/crypto/hisilicon/zip/zip_main.c

+2 −2
Original line number Diff line number Diff line
@@ -103,8 +103,8 @@ 
#define HZIP_PREFETCH_ENABLE		(~(BIT(26) | BIT(17) | BIT(0)))

#define HZIP_SVA_PREFETCH_DISABLE	BIT(26)

#define HZIP_SVA_DISABLE_READY		(BIT(26) | BIT(30))

#define HZIP_SHAPER_RATE_COMPRESS	252

#define HZIP_SHAPER_RATE_DECOMPRESS	229

#define HZIP_SHAPER_RATE_COMPRESS	750

#define HZIP_SHAPER_RATE_DECOMPRESS	140

#define HZIP_DELAY_1_US		1

#define HZIP_POLL_TIMEOUT_US	1000