Commit 3ac7165d authored by Michael Tretter's avatar Michael Tretter Committed by Mauro Carvalho Chehab
Browse files

media: dt-bindings: media: fsl-pxp: convert to yaml 



Convert the bindings of the Freescale Pixel Pipeline to YAML.

The conversion drops the previously listed compatibles for several SoCs.
It is unclear, if the PXP on these SoCs is compatible to any of the PXPs
on the existing SoCs and would allow to reuse the already defined
compatibles. The missing compatibles should be brought back when the
support for the PXP on these SoCs is added.

Reviewed-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: default avatarMichael Tretter <m.tretter@pengutronix.de>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@kernel.org>
parent 77645c6e

Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)



%YAML 1.2

---

$id: http://devicetree.org/schemas/media/fsl,imx6ull-pxp.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Freescale Pixel Pipeline



maintainers:

  - Philipp Zabel <p.zabel@pengutronix.de>

  - Michael Tretter <m.tretter@pengutronix.de>



description:

  The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine

  that supports scaling, colorspace conversion, alpha blending, rotation, and

  pixel conversion via lookup table. Different versions are present on various

  i.MX SoCs from i.MX23 to i.MX7.



properties:

  compatible:

    oneOf:

      - enum:

          - fsl,imx6ul-pxp

          - fsl,imx6ull-pxp

          - fsl,imx7d-pxp

      - items:

          - enum:

              - fsl,imx6sll-pxp

              - fsl,imx6sx-pxp

          - const: fsl,imx6ull-pxp



  reg:

    maxItems: 1



  interrupts:

    minItems: 1

    maxItems: 2



  clocks:

    maxItems: 1



  clock-names:

    const: axi



  power-domains:

    maxItems: 1



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names



allOf:

  - if:

      properties:

        compatible:

          contains:

            enum:

              - fsl,imx6sx-pxp

              - fsl,imx6ul-pxp

    then:

      properties:

        interrupts:

          maxItems: 1

    else:

      properties:

        interrupts:

          minItems: 2

          maxItems: 2



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/imx6ul-clock.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    pxp: pxp@21cc000 {

        compatible = "fsl,imx6ull-pxp";

        reg = <0x021cc000 0x4000>;

        interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;

        clock-names = "axi";

        clocks = <&clks IMX6UL_CLK_PXP>;

    };

Documentation/devicetree/bindings/media/fsl-pxp.txt

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Freescale Pixel Pipeline

========================



The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine

that supports scaling, colorspace conversion, alpha blending, rotation, and

pixel conversion via lookup table. Different versions are present on various

i.MX SoCs from i.MX23 to i.MX7.



Required properties:

- compatible: should be "fsl,<soc>-pxp", where SoC can be one of imx23, imx28,

  imx6dl, imx6sl, imx6sll, imx6ul, imx6sx, imx6ull, or imx7d.

- reg: the register base and size for the device registers

- interrupts: the PXP interrupt, two interrupts for imx6ull and imx7d.

- clock-names: should be "axi"

- clocks: the PXP AXI clock



Example:



pxp@21cc000 {

	compatible = "fsl,imx6ull-pxp";

	reg = <0x021cc000 0x4000>;

	interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,

		     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;

	clock-names = "axi";

	clocks = <&clks IMX6UL_CLK_PXP>;

};