Commit 3bb426d0 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

ARM: dts: rcar-gen2: Add missing mmio-sram bus properties 



"#address-cells", "#size-cells", and "ranges" are required properties
for devices nodes compatible with "mmio-sram", leading to warnings when
running "make dtbs_check":

    $ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/sram/sram.yaml
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: '#address-cells' is a required property
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: '#size-cells' is a required property
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: 'ranges' is a required property
    ...

Fix this by adding the missing properties to the mmio-sram device nodes
in the DTS files for all affected R-Car Gen2 and RZ/G1 SoCs.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213162604.1890-1-geert+renesas@glider.be
parent 50512886

arch/arm/boot/dts/r8a7743.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -399,6 +399,9 @@ ipmmu_gp: mmu@e62a0000 { 
		icram0:	sram@e63a0000 {

			compatible = "mmio-sram";

			reg = <0 0xe63a0000 0 0x12000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0 0xe63a0000 0x12000>;

		};



		icram1:	sram@e63c0000 {
@@ -417,6 +420,9 @@ smp-sram@0 { 
		icram2:	sram@e6300000 {

			compatible = "mmio-sram";

			reg = <0 0xe6300000 0 0x40000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0 0xe6300000 0x40000>;

		};



		/* The memory map in the User's Manual maps the cores to

arch/arm/boot/dts/r8a7744.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -399,6 +399,9 @@ ipmmu_gp: mmu@e62a0000 { 
		icram0:	sram@e63a0000 {

			compatible = "mmio-sram";

			reg = <0 0xe63a0000 0 0x12000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0 0xe63a0000 0x12000>;

		};



		icram1:	sram@e63c0000 {
@@ -417,6 +420,9 @@ smp-sram@0 { 
		icram2:	sram@e6300000 {

			compatible = "mmio-sram";

			reg = <0 0xe6300000 0 0x40000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0 0xe6300000 0x40000>;

		};



		/* The memory map in the User's Manual maps the cores to

arch/arm/boot/dts/r8a7745.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -363,6 +363,9 @@ ipmmu_gp: mmu@e62a0000 { 
		icram0:	sram@e63a0000 {

			compatible = "mmio-sram";

			reg = <0 0xe63a0000 0 0x12000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0 0xe63a0000 0x12000>;

		};



		icram1:	sram@e63c0000 {
@@ -381,6 +384,9 @@ smp-sram@0 { 
		icram2:	sram@e6300000 {

			compatible = "mmio-sram";

			reg = <0 0xe6300000 0 0x40000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0 0xe6300000 0x40000>;

		};

		i2c0: i2c@e6508000 {

			#address-cells = <1>;

arch/arm/boot/dts/r8a77470.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -242,6 +242,9 @@ irqc: interrupt-controller@e61c0000 { 
		icram0:	sram@e63a0000 {

			compatible = "mmio-sram";

			reg = <0 0xe63a0000 0 0x12000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0 0xe63a0000 0x12000>;

		};



		icram1:	sram@e63c0000 {
@@ -260,6 +263,9 @@ smp-sram@0 { 
		icram2:	sram@e6300000 {

			compatible = "mmio-sram";

			reg = <0 0xe6300000 0 0x20000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0 0xe6300000 0x20000>;

		};



		i2c0: i2c@e6508000 {

arch/arm/boot/dts/r8a7790.dtsi

+3 −0
Original line number Diff line number Diff line
@@ -487,6 +487,9 @@ ipmmu_rt: mmu@ffc80000 { 
		icram0:	sram@e63a0000 {

			compatible = "mmio-sram";

			reg = <0 0xe63a0000 0 0x12000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0 0xe63a0000 0x12000>;

		};



		icram1:	sram@e63c0000 {